ST92F124 datasheet(63/429 Pages) STMICROELECTRONICS

63 / 429 page

63/429

ST92F124/F150/F250 - SINGLE VOLTAGE FLASH & E3 TM (EMULATED EEPROM)

PROTECTION STRATEGY (Cont’d)

NON VOLATILE PASSWORD (NVPWD1-0)

Address: 231FFF-231FFEh - Write Only

Delivery value: 1111 1111 (FFh)

Bit 7:0 = PWD[7:0]: Password bits 7:0 (Write On-

ly).

These bits must be programmed with the Non Vol-

atile Password that must be provided with the Set

Protection operation to disable (first write access)

or to reenable (second write access) the test and

EPB modes. The first write access fixes the pass-

word value and resets the TMDIS bit of NVWPR

(231FFDh). The second write access, with Pro-

gram Data matching with NVPWD[1:0] content, re-

sets the PWOK bit of NVWPR.

These two registers can be accessed only in write

mode (a read access returns FFh).

3.5.2 Temporary Unprotection

On user request the memory can be configured so

as to allow the temporary unprotection also of all

access protections bits of NVAPR (write protection

bits of NVWPR are always temporarily unprotecta-

ble).

Bit APEX can be temporarily disabled by execut-

ing the Set Protection operation and writing 1 into

this bit, but only if this write instruction is executed

from an internal memory (Flash and Test Flash ex-

cluded).

Bit APEE can be temporarily disabled by execut-

ing the Set Protection operation and writing 1 into

this bit, but only if this write instruction is executed

from the memory itself to unprotect (E3 TM).

Bits APRO and APBR can be temporarily disabled

through a direct write at NVAPR location, by over-

writing at 1 these bits, but only if this write instruc-

tion is executed from the memory itself to unpro-

tect.

To restore the access protections, reset the micro

or execute another Set Protection operation by

writing 0 to the desired bits.

Note: To restore all the protections previously en-

abled in the NVAPR or NVWPR register, read the

corresponding register.

When an internal memory (Flash, TestFlash or

E3 TM

) is protected in access, also the data access

through a DMA of a peripheral is forbidden (it re-

turns FFh). To read data in DMA mode from a pro-

tected memory, first it is necessary to temporarily

unprotect that memory.

The temporary unprotection allows also to update

a protected code.

Refer to the following figures to manage the Test/

EPB, Access and Write protection modes.

PWD7 PWD6 PWD5 PWD4 PWD3 PWD2 PWD1 PWD0

ST92F124 数据表(PDF) 63 Page - STMicroelectronics

ST92F124 数据表(HTML) 63 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载