PCF5083HSLASH5V2SLASHF3 datasheet(24/136 Pages) PHILIPS

24 / 136 page

1996 Oct 29

Philips Semiconductors

Objective speciﬁcation

GSM signal processing IC

PCF5083

8.3.2.2

Transmitter Timing

The transmitter timing is shown in Table 10. The start and duration times are defined by loading the named registers.

Table 10 Transmitter Timing

Notes

1. The timing advance is adjusted with the value of TXSTART_REG.

2. TXBURSTx_REG and TXKEYx_REG (x = 0 or 1) is selected with a flag in register MODEx_REG.

3. Therefore (N)PDBIAS will always be active at least 4

× 32 QB prior to PDTX1.

BURST TYPE

SIGNAL

START (QB)(1)

DURATION (QB)(2)

TX burst

TXON

TXSTART_REG + 929 = (0 to 2047) + 929

TXLENGTHx_REG = (1 to 255)

BEN

TXSTART_REG + 928 = (0 to 2047) + 928

to end of TXON + 16

(N)PDTX1,2

TXSTART_REG + 1024

− PDRX1,2_REG × 32 =

(0 to 2047) + 1024

− (0 to 31) × 32

to end of TXKEY + PDDELAY_REG

(1 to 63)

(N)PDBIAS

TXSTART_REG + 1024

− PDBIAS_REG × 32 =

(0 to 2047) + 1024

− (0 to 31) × 32

or if PDBIAS_REG < PDTX1_REG + 4 (note 3):

TXSTART_REG + 1024

− (PDTX1_REG + 4) × 32

= (0 to 2047) + 1024

− (0 to 31) × 32

to end of

TXKEY + PDDELAY_REG + 32 (1 to 63)

TXKEY1

TXSTART_REG + 929 + KEYON1_REG =

(0 to 2047) + 929

+ (1 to 511) × 32

TXKEYx_REG = (1 to 1023)

TXKEY2

TXSTART_REG + 929 + KEYON2_REG =

(0 to 2047) + 929

+ (1 to 511) × 32

to end of TXKEYx + KEYOFF_REG

(1 to 63)

PDSYN

TXSTART_REG + 1024

− PDSYN_REG × 32 =

(0 to 2047) + 1024

− (1 to 31) × 32

to end of TXKEYx + PDDELAY_REG

(1 to 63)

PCF5083H/5V2/F3 数据表(PDF) 24 Page - NXP Semiconductors

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