PCF5083HSLASH5V2SLASHF3 datasheet(27/136 Pages) PHILIPS

27 / 136 page

1996 Oct 29

Philips Semiconductors

Objective speciﬁcation

GSM signal processing IC

PCF5083

Table 13 Register selection for the Rx burst

8.3.2.4

MON burst during idle frame

This burst is a special case of the MON burst. It is used for FCB search and for monitoring during the idle frame. If

RECON is set, a timing equivalent to the MON burst timing is generated, with the exception that all output lines (BEN,

RXON, PDRXx etc.) are kept active at the end of the burst. The output lines are set inactive again during the first frame

with RECMON set at the time, they normally would be deactivated at the end of a MON burst. During the frames in

between, either RECON = 1, or RECRX = RECTX = RECMON = RECON = SEND = 0 must be programmed.

8.3.2.5

Which of the registers MODE0_REG or MODE1_REG is used for timing generation is determined using the following two

rules:

1. After any write access to MODE0_REG, MODE0_REG is active during the next frame.

2. After every frame the USEMODE flag of the currently active register determines which register is used during the

next frame, unless there was a write access to MODE0_REG during the current frame.

e.g. MODE0_REG: USEMODE = 1 and MODE1_REG: USEMODE = 0 is programmed during frame N.

This causes the following timing:

a) MODE0_REG is active during frame N + 1

b) MODE1_REG is active during frame N + 2

c) MODE0_REG is active during frame N + 3 and so on, until MODE0_REG is being written again.

8.3.2.6

DTX Mode Processing

DTX mode (Discontinuous Transmission) is enabled with MODEx_REG[DTX] = 1. In DTX mode, the DSP makes the

decision whether a TX burst should be generated or not. The DTX condition is signalled via IO4 (generate transmit burst:

IO4 = 0, no transmit burst: IO4 = 1). If no TX burst is to be generated, the power-down lines TXKEY1/2, (N)PDTX1/2 and

PDSYN are kept inactive or if already asserted, they are set inactive again. (N)PDBIAS become inactive with their default

delay of 8 bit after (N)PDTX1/2 respective PDSYN if they were already asserted, otherwise they also remain inactive.

TXON and BEN are not affected from DTX mode.

8.3.2.7

Interface to the RF-IC Bus

The Timing Generator provides trigger signals for the frequency and gain control channels of the RF-IC interface when

the quarterbit counter matches either RXSTART_REG, TXSTART_REG or MONSTART_REG. Further trigger signals

are generated for the gain control channel after every receive burst to send the contents of register DACOFF_REG and

prior to a receive burst if the quarterbit counter matches xxSTART_REG + 1024

− AGCSTART_REG × 32 (xx = RX, TX

or MON) to send the contents of register DACON_REG (refer to Section 8.4).

Note, if the generation of a trigger signal falls into an active burst, the trigger signal is delayed until the end of the current

burst.

RXLENGTH1

RXLENGTH0

RXBURST0_REG is used.

RXBURST1_REG is used.

RXBURST2_REG is used.

Undeﬁned during a RX burst.

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