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AS73211

Functional Description

Datasheet

• PUBLIC

DS000556

• v3-01 • 2018-Feb-07

│ 25

Figure 23:

Principle Sequence of CONT Mode

– if CREG3:SB is Set to ‚1’

Another example shows, that after the end of a conversion in CMD mode the AS73211 returns to

Power Down and/or Standby state depending on the bits OSR:PD and CREG3:SB. In case of both

bits are ‚0‘ while in Measurement state the device would return to idle, waiting for the next

measurement to start. Figure 24: Principle sequence whereas measurement starts in CMD mode with

Power Down and Standby switched on (device is already in Measurement state):

CREG3 programming: bit CREG3:SB = ‚1‘ was set in Configuration state (not shown),

OSR programming: C0h, “startup” and “wake-up” before conversion starts,

“Automatically” OSR programming: 43h, the end of conversion resets bit OSR:SS, return

to Power Down.

Figure 24:

Principle Sequence Whereas Measurement is Started in CMD Mode with Power Down, Standby

Switched On

STANDBY

MRES1 …

MRES3

READY

STATE

I²C activity

MEASUREMENT 1

data

fetch

RESULTS 1

RESULTS 2

data

fetch

TBREAK

MEASUREMENT 2

MEASUREMENT 3

TCONV

OSR

83h

TSTARTSB

STANDBY

PAUSE

STANDBY

PAUSE

RESULTS

POWDOWN

MEASUREMENT

TCONV

MRES1 …

MRES3

READY

STATE

I²C activity

start (OSR:SS ← ’1')

TSTARTPD

TSTARTSB

data

fetch

clear (OSR:SS ← ’0')

STANDBY

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