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AS73211 数据表(PDF) 31 Page - OSRAM GmbH

部件名 AS73211
功能描述  XYZ True Color Sensor with I²C Interface
PDF  66 Pages
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制造商  OSRAM [OSRAM GmbH]
网页  http://www.osram.com
标志 OSRAM - OSRAM GmbH

AS73211 数据表(HTML) 31 Page - OSRAM GmbH

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AS73211
Functional Description
Datasheet
• PUBLIC
DS000556
• v3-01 • 2018-Feb-07
65
│ 30
internal conversion time TCONV are determined by the content of register bits CREG1:GAIN and
CREG1:TIME (see Figure 48). Their values directly determine the sensitivity, the LSB value and the
full-scale range (FSR) of the detectable irradiance Ee of the A/D conversion.
Figure 29:
X-
Channel (λ = 600nm) Programmable FSR and LSB of the Detectable Input Light Irradiance Ee
with CREG1:TIME Programming from 0 to 7 and CREG1:GAIN Programming from 0 to 11
CONT, CMD and SYNS Mode
TIME
(1)
0
1
2
3
4
5
6
7
NCLK(1)
1024
2048
4096
8192
16384
32768
65536
131072
TCONV[ms](1)
1
2
4
8
16
32
64
128
RESOL[bit](1)
10
11
12
13
14
15
16
17
GAIN(1)
FSR [µW/cm²] of detectable irradiance Ee (channel X)
2048x
13.854
6.927
1024x
27.707
13.854
512x
55.414
27.707
256x
110.828
55.414
128x
221.657
110.828
64x
443.314
221.657
32x
886.628
443.314
16x
1773.255
886.628
8x
3546.510
1773.255
4x
7093.020
3546.510
2x
14186.041
7093.020
1x
28372.081
14186.041
GAIN (1)
LSB [nW/cm²]
– least significant bit of FSR (channel X)
2048x
13.5289
6.7644
3.3822
1.6911
0.8456
0.4228
0.2114
0.1057
1024x
27.0577
13.5289
6.7644
3.3822
1.6911
0.8456
0.4228
0.2114
512x
54.1155
27.0577
13.5289
6.7644
3.3822
1.6911
0.8456
0.4228
256x
108.2309
54.1155
27.0577
13.5289
6.7644
3.3822
1.6911
0.8456
128x
216.4618
108.2309
54.1155
27.0577
13.5289
6.7644
3.3822
1.6911
64x
432.9236
216.4618
108.2309
54.1155
27.0577
13.5289
6.7644
3.3822
32x
865.8472
432.9236
216.4618
108.2309
54.1155
27.0577
13.5289
6.7644
16x
1731.6944
865.8472
432.9236
216.4618
108.2309
54.1155
27.0577
13.5289
8x
3463.3888
1731.6944
865.8472
432.9236
216.4618
108.2309
54.1155
27.0577
4x
6926.7777
3463.3888
1731.6944
865.8472
432.9236
216.4618
108.2309
54.1155
2x
13853.5554
6926.7777
3463.3888
1731.6944
865.8472
432.9236
216.4618
108.2309
1x
27707.1108
13853.5554
6926.7777
3463.3888
1731.6944
865.8472
432.9236
216.4618
(1)
TIME (TCONV)
– given by CREG1:TIME = 0 … 7 dec, NCLK – number of clock cycle within conversion time TCONV,
RESOL
– Resolution of internal A/D conversion, GAIN = 1x given by CREG1:GAIN = 11dec up to GAIN = 2048x given
by CREG1:GAIN = 0dec (see Figure 48)



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