TCS3530 datasheet(46/106 Pages) OSRAM

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Datasheet, Public

Page 45

[v3-00] 2023-Jun-23

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TCS3530 − Register Overview

CFG4 Register

Figure 54:

CFG4

Note(s):

1. Return to the Register Map (0xA5).

Addr: 0xA5

CFG4

Bit

Field

Reset

Type

Bit Description

7Reserved

MOD_

CALIBRATION_

NTH_ITERATION_

STEP_ENABLE

0R/W

Enable a modulator calibration with nth iterations per

sequencer step instead of waiting for a full round for all

sequencers to be finished. In case of AGC enabled (MOD_

CALIB_NTH_ITERATION_AGC_ENABLE) this bit must be

set “0”, otherwise AGC will not properly work.

MEASUREMENT_

SEQUENCER_AGC_

PREDICT_TARGET_

LEVEL

0R/W

Sets the target measurement levels for AGC prediction.

0b: 50% of max value

1b: 25% of max value

MEASURMENT_

SEQUENCER_

SINT_PER_STEP

0R/W

Invokes the system interrupt SINT_MEASUREMENT_

SEQUENCER per sequencer step instead of after a full

sequencer round.

OSC_TUNE_NO_

RESET

If set to 0, OSC_TUNE gets reset to 0 if PON is set to 1. If set

to 1, OSC_TUNE keeps its value if PON is set to 1.

2Reserved

1:0

MOD_ALS_FIFO_

DATA_FORMAT

0R/W

Sets the format for ALS data written to FIFO. Please

observe readout pattern if digital or analog saturation has

occurred.

00b: 16-bit (FFFF analog sat, FFFE digital sat)

01b: 24-bit (FFFFFF analog sat, FFFFFE digital sat)

10b: Reserved

11b: 32-bit (FFFFFFFF analog sat)

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