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4LS 数据表(PDF) 76 Page - OSRAM GmbH |
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4LS 数据表(HTML) 76 Page - OSRAM GmbH |
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76 / 115 page ![]() Document Feedback 4LS Register Description Datasheet • PUBLIC DS000542 • v3-01 • 2022-Nov-17 114 │ 75 9.1.29 Read Request Register (Address 0x1C) Figure 127: RRQReg Address: 0x1C Default Value: 0x00 Access: Write Bit Bit Name Default Bit Description 7:0 Address to Read 00000000b Defines the register address to be read in a read back operation over SPI interface. 9.1.30 Status 4 Register (Address 0x1D) Figure 128: STS4Reg Address: 0x1D Default Value: 0x49 Access: Read/Write Bit Bit Name Default Bit Description 7:7 Enable VRST Special Buffer 0b Internal Debug Purposes Use default value. 6:6 Enable Boost VREF 1b When set to ‘1’ enables a higher output current on VREF buffer. 5:5 Enable Boost VRST Special 0b Internal Debug Purposes Use default value. 4:4 Special Mode 0b Internal Debug Purposes Use default value. 3:3 Standard Mode 1b When set to ‘1’ enables readout of regular pixels. Use default value. 2:2 PLL Enhance Current 0b To be used in case of insufficient current to PLL or process defect. 1:1 Set Counter Reference Voltage 0b Sets the counter LVDS reference voltage to 0.9 V or 0.5 V when at ‘0’ or ‘1’, respectively. 0:0 Sense Switches ON 1b When set to ‘1’ enables the Sense Amps switches. |
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