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MPC860DP 数据表(PDF) 31 Page - Freescale Semiconductor, Inc |
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MPC860DP 数据表(HTML) 31 Page - Freescale Semiconductor, Inc |
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31 / 80 page ![]() MPC860 Family Hardware Specifications, Rev. 7 Freescale Semiconductor 31 Bus Signal Timing Figure 17. Asynchronous UPWAIT Asserted Detection in UPM Handled Cycles Timing Figure 18 provides the timing for the asynchronous negated UPWAIT signal controlled by the UPM. Figure 18. Asynchronous UPWAIT Negated Detection in UPM Handled Cycles Timing Figure 19 provides the timing for the synchronous external master access controlled by the GPCM. CLKOUT CSx UPWAIT GPL_A[0:5], GPL_B[0:5] BS_A[0:3], BS_B[0:3] B37 B38 CLKOUT CSx UPWAIT GPL_A[0:5], GPL_B[0:5] BS_A[0:3], BS_B[0:3] B37 B38 |
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