MPC860DP datasheet(71/80 Pages) FREESCALE

71 / 80 page

MPC860 Family Hardware Specifications, Rev. 7

Freescale Semiconductor

Mechanical Data and Ordering Information

Figure 74 shows the MII serial management channel timing diagram.

Figure 74. MII Serial Management Channel Timing Diagram

14 Mechanical Data and Ordering Information

Table 33 provides information on the MPC860 Revision D.4 derivative devices.

M13

MII_MDIO (input) to MII_MDC rising edge hold

—

M14

MII_MDC pulse width high

40%

60%

MII_MDC

period

M15

MII_MDC pulse width low

40%

60%

MII_MDC

period

Table 33. MPC860 Family Revision D.4 Derivatives

Device

Number of

SCCs 1

Ethernet Support 2

(Mbps)

Multichannel

HDLC Support

ATM

Support

MPC855T

10/100

Yes

MPC860DE

N/A

MPC860DT

10/100

Yes

MPC860DP

10/100

Yes

Table 32. MII Serial Management Channel Timing

Num

Characteristic

Min

Max

Unit

M11

MII_MDC (Output)

MII_MDIO (Output)

M12

M13

MII_MDIO (Input)

M10

M14

MM15

MPC860DP 数据表(PDF) 71 Page - Freescale Semiconductor, Inc

MPC860DP 数据表(HTML) 71 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

数据表下载

链接网址

MPC860DP 数据表(PDF) 71 Page - Freescale Semiconductor, Inc

MPC860DP 数据表(HTML) 71 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

数据表 下载

链接网址

数据表下载