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MPC860DP 数据表(PDF) 63 Page - Freescale Semiconductor, Inc |
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MPC860DP 数据表(HTML) 63 Page - Freescale Semiconductor, Inc |
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63 / 80 page ![]() MPC860 Family Hardware Specifications, Rev. 7 Freescale Semiconductor 63 CPM Electrical Characteristics Figure 65. SPI Master (CP = 1) Timing Diagram 11.11SPI Slave AC Electrical Specifications Table 25 provides the SPI slave timings as shown in Figure 66 and Figure 67. Table 25. SPI Slave Timing Num Characteristic All Frequencies Unit Min Max 170 Slave cycle time 2 — tcyc 171 Slave enable lead time 15 — ns 172 Slave enable lag time 15 — ns 173 Slave clock (SPICLK) high or low time 1 — tcyc 174 Slave sequential transfer delay (does not require deselect) 1 — tcyc 175 Slave data setup time (inputs) 20 — ns 176 Slave data hold time (inputs) 20 — ns 177 Slave access time — 50 ns SPIMOSI (Output) SPICLK (CI=0) (Output) SPICLK (CI=1) (Output) SPIMISO (Input) Data 166 167 161 161 160 msb lsb msb msb Data lsb msb 167 166 163 166 167 165 164 162 |
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