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STA382BWSTR 数据表(PDF) 56 Page - STMicroelectronics |
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STA382BWSTR 数据表(HTML) 56 Page - STMicroelectronics |
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56 / 172 page  Register description: New Map STA382BWS 56/172 Doc ID 022784 Rev 1 6.11 FUNCT register (addr 0x0A) 6.11.1 Dual-band DRC The STA382BWS device provides a dual-band DRC (B2DRC) on the left and right channels data path, as depicted in Figure 24. Dual-band DRC is activated by setting MDRCE = 1. Figure 24. B2DRC scheme The low-frequency information (LFE) is extracted from the left and right channels, removing the high frequencies using a programmable biquad filter, and then computing the difference D7 D6 D5 D4 D3 D2 D1 D0 Reserved CRC APEQ PEQ Reserved AMDRC MDRCE DRC 00 10 00 0 0 Table 25. FUNCT register Bit R/W RST Name Description 6R/W 0 CRC ‘0’: disable CRC computation and comparison ‘1’: enable CRC computation and comparison 5 R/W 1 APEQ ‘0’: extended BQ disabled, 8th biquadratic filter disabled ‘1’: extended BQ enabled, 8th biquadratic filter enabled 4 R/W 0 PEQ ‘0’: Normal operation ‘1’: PEQ disabled, disables all biquadratic filters 2 R/W 0 AMDRC ‘0’: STCompressor bypassed ‘1’: STCompressor enabled 1 R/W 0 MDRCE ‘0’: MDRCE bypassed ‘1’: MDRCE enabled 0R/W 0 DRC ‘0’: DRC disabled ‘1’: DRC enabled B2DRC Hi-pass XO filter L R B2DRC Hi-pass XO filter - Channel 1 Volume DRC 1 Channel 3 Volume DRC 2 ++ - + Channel 3 Volume DRC 2 Channel 2 Volume DRC 1 + Obsolete Product(s) - Obsolete Product(s) |
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