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STA382BWSTR 数据表(PDF) 99 Page - STMicroelectronics |
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STA382BWSTR 数据表(HTML) 99 Page - STMicroelectronics |
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99 / 172 page ![]() STA382BWS Register description: New Map Doc ID 022784 Rev 1 99/172 6.35 STCompressorTM configuration register (address 0x6B; 0x6C) Table 95. Register STCCFG0 Table 97. Register STCCFG1 6.36 Charge pump synchronization (address 0x70) Table 99. Charge pump sync configuration bits D7 D6 D5 D4 D3 D2 D1 D0 Reserved Reserved Reserved Reserved Reserved CRC_RES Reserved Reserved 00 01 00 0 0 Table 96. STCCFG0 register Bit R/W RST Name Description 2 R/W 0 CRC_RES ‘0’ = CRC comparison successful ‘1’ = CRC comparison error D7 D6 D5 D4 D3 D2 D1 D0 Reserved Reserved Reserved Reserved Reserved Reserved STC_LNK Reserved 00 00 00 0 0 Table 98. STCCFG1 register Bit R/W RST Name Description 1R/W 0 STC_LNK ‘0’ = normal operations ‘1’ = stereo link enabled. See Section 4.3.8: Stereo link D7 D6 D5 D4 D3 D2 D1 D0 Reserved Reserved CHPI INITCNT[3:0] CHPRD 00 01 10 0 1 Bit R/W RST Name Description 5 R/W 0 CHPI ‘0’: Charge pump phase: 0 deg ‘1’: Charge pump phase: 180 deg 4R/W 1 INITCNT[3:0] Change charge pump phase at one clock step 3R/W 1 2R/W 0 1R/W 0 0 R/W 1 CHPRD ‘0’: Charge pump synchronized with PWM frame ‘0’: Charge pump not synchronized with PWM frame Obsolete Product(s) - Obsolete Product(s) |
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