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D950-CORE 数据表(PDF) 82 Page - STMicroelectronics

部件名 D950-CORE
功能描述  16-Bit Fixed Point Digital Signal Processor DSP Core
PDF  89 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

D950-CORE 数据表(HTML) 82 Page - STMicroelectronics

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D950-Core
DIEi:
Enable Interrupt
0: Interrupt request output associated to channel i is masked (def.)
1: Interrupt request output associated to channel i is not masked
DMS: Mask Sensitivity control register
Two bits are dedicated to each DMA channel (bits 0 and 1 to channel 0, bits 4 and 5 to channel
1, bits 8 and 9 to channel 2, bits 12 and 13 to channel 3). After reset, DMS default value is
0x3333.
DSEi:
DMA Sensitivity
0: Low level
1: Falling edge (def.)
DMKi:
DMA Mask
0: DMA channel not masked
1: DMA channel masked (def.)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-
-
DSE3
DMK3
-
-
DSE2
DMK2
-
-
DSE1
DMK1
-
-
DSE0
DMK0



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