D950-CORE datasheet(6/89 Pages) STMICROELECTRONICS

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D950-Core

PIN DESCRIPTION

The following tables detail the D950-Core pin set. There is one table for each group of pins.

The tables detail the pin name, type and a short description of the pin function. A diagram of

the D950-Core I/O interface is contained at the end of the section.

Table 2.1

DATA BUSES (70 PINS)

Pin Name

Type

Description

XD0-XD15

I/O

X Data Bus.

Hi-Z during cycles with no X-bus exchange.

XA0-XA15

X Address bus.

Hi-Z when in Hold.

XRD

X-bus read strobe. Active low.

Hi-Z when in Hold.

XWR

X-bus write strobe. Active low.

Hi-Z when in Hold.

XBS

X-bus strobe. Active low.

Hi-Z when in Hold.

Asserted low at the beginning of a valid X-bus cycle.

YD0-YD15

I/O

Y Data Bus.

Hi-Z during cycles with no Y-bus exchange.

YA0-YA15

Y Address bus.

Hi-Z when in Hold.

YRD

Y-bus read strobe. Active low.

Hi-Z when in Hold.

YWR

Y-bus write strobe. Active low.

Hi-Z when in Hold.

YBS

Y-bus strobe. Active low.

Hi-Z when in Hold.

Asserted low at the beginning of a valid Y-bus cycle.

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