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CC115LRGPR 数据表(PDF) 48 Page - Texas Instruments |
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CC115LRGPR 数据表(HTML) 48 Page - Texas Instruments |
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48 / 74 page ![]() CC115L SWRS105B – MAY 2011 – REVISED JUNE 2014 www.ti.com Table 5-20. 0x03: FIFOTHR - TX FIFO Thresholds Bit Field Name Reset R/W Description 7:4 0 R/W Use setting from SmartRF Studio Set the threshold for the TX FIFO. The threshold is exceeded when the number of bytes in the TX FIFO is equal to or higher than the threshold value. Setting Bytes in TX FIFO 0 (0000) 61 1 (0001) 57 2 (0010) 53 3 (0011) 49 4 (0100) 45 5 (0101) 41 3:0 FIFO_THR[3:0] 7 (0111) R/W 6 (0110) 37 7 (0111) 33 8 (1000) 29 9 (1001) 25 10 (1010) 21 11 (1011) 17 12 (1100) 13 13 (1101) 9 14 (1110) 5 15 (1111) 1 Table 5-21. 0x04: SYNC1 - Sync Word, High Byte Bit Field Name Reset R/W Description 7:0 SYNC[15:8] 211 (0xD3) R/W 8 MSB of 16-bit sync word Table 5-22. 0x05: SYNC0 - Sync Word, Low Byte Bit Field Name Reset R/W Description 7:0 SYNC[7:0] 145 (0x91) R/W 8 LSB of 16-bit sync word Table 5-23. 0x06: PKTLEN - Packet Length Bit Field Name Reset R/W Description Indicates the packet length when fixed packet length mode 7:0 PACKET_LENGTH 255 (0xFF) R/W is enabled. This value must be different from 0. Table 5-24. 0x08: PKTCTRL0 - Packet Automation Control Bit Field Name Reset R/W Description 7 R0 Not used 6 1 R/W Use setting from SmartRF Studio 48 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC115L |
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