CC115LRGPR datasheet(12/74 Pages) TI2

12 / 74 page

CC115L

SWRS105B – MAY 2011 – REVISED JUNE 2014

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4.10 Power-On Reset

For proper Power-On-Reset functionality the power supply should comply with the requirements in Section 4.10. Otherwise,

the chip should be assumed to have unknown state until transmitting an SRES strobe over the SPI interface. See

Section 5.10.1, Power-On Start-Up Sequence, for further details.

Parameter

Min

Typ

Max

Unit

Condition

Power-up ramp-up time

From 0 V until reaching 1.8 V

Minimum time between power-on and power-

Power off time

off

4.11 Thermal Characteristics

NAME

DESCRIPTION

QFN (°C/W)

RθJA

Junction-to-ambient thermal resistance

RθJC(top)

Junction-to-case (top) thermal resistance

RθJB

Junction-to-board thermal resistance

13.6

RθJC(bot)

Junction-to-case (bottom) thermal resistance

5.12

Specifications

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