CC115LRGPR datasheet(60/74 Pages) TI2

60 / 74 page

parasitic

101

CC115L

SWRS105B – MAY 2011 – REVISED JUNE 2014

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6.3

Crystal

A crystal in the frequency range 26 - 27 MHz must be connected between the XOSC_Q1 and XOSC_Q2

pins. The oscillator is designed for parallel mode operation of the crystal. In addition, loading capacitors

(C81 and C101) for the crystal are required. The loading capacitor values depend on the total load

capacitance, CL, specified for the crystal. The total load capacitance seen between the crystal terminals

should equal CL for the crystal to oscillate at the specified frequency.

(7)

The parasitic capacitance is constituted by pin input capacitance and PCB stray capacitance. Total

parasitic capacitance is typically 2.5 pF.

The crystal oscillator is amplitude regulated. This means that a high current is used to start up the

oscillations. When the amplitude builds up, the current is reduced to what is necessary to maintain

approximately 0.4 Vpp signal swing. This ensures a fast start-up, and keeps the drive level to a minimum.

The ESR of the crystal should be within the specification in order to ensure a reliable start-up (see

Section 4.7).

The initial tolerance, temperature drift, aging and load pulling should be carefully specified in order to meet

the required frequency accuracy in a certain application.

Avoid routing digital signals with sharp edges close to XOSC_Q1 PCB track or underneath the crystal dc

operating point and result in duty cycle variation.

For compliance with modulation bandwidth requirements under EN 300 220 V2.3.1 in the 863 to 870 MHz

frequency range it is recommended to use a 26 MHz crystal for frequencies below 869 MHz and a 27 MHz

crystal for frequencies above 869 MHz.

6.4

Reference Signal

The chip can alternatively be operated with a reference signal from 26 to 27 MHz instead of a crystal. This

input clock can either be a full- swing digital signal (0 V to VDD) or a sine wave of maximum 1 V peak-

peak amplitude. The reference signal must be connected to the XOSC_Q1 input. The sine wave must be

connected to XOSC_Q1 using a serial capacitor. When using a full-swing digital signal, this capacitor can

be omitted. The XOSC_Q2 line must be left un-connected. C81 and C101 can be omitted when using a

reference signal.

6.5

Additional Filtering

In the 868/915 MHz reference design SWRR082, C127 and L125 together with C126 build an optional

filter to reduce emission at carrier frequency - 169 MHz. This filter is necessary for applications with an

external antenna connector that seek compliance with ETSI EN 300 220 V2.3.1. For more information,

see DN017 SWRA168. If this filtering is not necessary, C126 will work as a DC block (only necessary if

there is a DC path in the antenna). C127 and L125 should in that case be left unmounted.

Additional external components (that is, an RF SAW filter) may be used in order to improve the

performance in specific applications.

6.6

Power Supply Decoupling

The power supply must be properly decoupled close to the supply pins. Note that decoupling capacitors

are not shown in the application circuit. The placement and the size of the decoupling capacitors are very

important to achieve the optimum performance (SWRR081 and SWRR082 should be followed closely).

Applications, Implementation, and Layout

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