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SSM2602CPZ-R2 数据表(PDF) 5 Page - Analog Devices |
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SSM2602CPZ-R2 数据表(HTML) 5 Page - Analog Devices |
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5 / 32 page ![]() SSM2602 Rev. 0 | Page 5 of 32 TIMING CHARACTERISTICS Table 3. I2C® Timing Limit Parameter tMIN tMAX Unit Description tSCS 600 ns Start condition setup time tSCH 600 ns Start condition hold time tPH 600 ns SCLK pulse width high tPL 1.3 μs SCLK pulse width low fSCLK 0 526 kHz SCLK frequency tDS 100 ns Data setup time tDH 900 ns Data hold time tRT 300 ns SDIN and SCLK rise time tFT 300 ns SDIN and SCLK fall time tHCS 600 ns Stop condition setup time SCLK SDIN tRT tSCH tPL tDS tPH tDH tFT tSCS tHCS Figure 2. I2C Timing Table 4. SPI Timing Limit Parameter tMIN tMAX Unit Description tDSU 20 ns SDIN to SCLK setup time tDHO 20 ns SCLK to SDIN hold time tSCH 20 ns SCLK pulse width high tSCL 20 ns SCLK pulse width low tSCS 60 ns SCLK rising edge to CSB rising edge tCSS 20 ns CSB rising to SCLK rising tCSH 20 ns CSB pulse width high tCSL 20 ns CSB pulse width low tPS 0 5 ns Pulse width of spikes to be suppressed CSB SCLK SDIN tCSL tCSH tDHO tCSS tDSU tSCS tSCL tSCH Figure 3. SPI Timing |
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