SSM2602CPZ-R2 datasheet(15/32 Pages) AD

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SSM2602

Rev. 0 | Page 15 of 32

Bypass and Sidetone Paths to Output

The line and microphone inputs can be routed and mixed directly

to the output terminals via the SIDETONE_EN (Register R4,

Bit D5) and BYPASS (Register R4, Bit D3) software control register

selections. In both of these modes, the analog input signal is routed

directly to the output terminals and is not digitally converted. The

bypass signal at the output mixer is the same level as the output of

the PGA associated with each line input.

The sidetone signal at the output mixer must be attenuated by a

range of −6 dB to −15 dB in steps of −3 dB by configuring the

SIDETONE_ATT (Register R4, Bit D6 and Bit D7) control

initial microphone signal amplification from the microphone

first- and second-stage gains.

Line and Headphone Outputs

The DAC outputs, the microphone (the sidetone path), and the

line inputs (the bypass path) are summed at an output mixer.

This output signal can be present at both the stereo line outputs

and stereo headphone outputs.

LINE OUTPUT

AND

HEADPHONE

OUTPUT

AVDD

VMID

AGND

BYPASS

SIDETONE

DACSEL

LINE

INPUT

MICROPHONE

INPUT

DAC

OUTPUT

Figure 21. Output Signal Chain

The SSM2602 has a set of efficient headphone amplifier

outputs, LHPOUT and RHPOUT, that are able to drive 16 Ω or

32 Ω headphone speakers.

xHPOUT

DAC/

SIDETONE/

BYPASS

AVDD

VMID

AGND

–

Figure 22. Headphone Output

In similar functionality to the line inputs, the LHPOUT and

RHPOUT volumes, by default, are independently adjusted by

setting the LHPVOL (Register R2, Bit D0 to Bit D6) and RHPVOL

(Register R3, Bit D0 to Bit D6) bits of the headphone output

control registers. The headphone outputs can be muted by writing

codes less than 0110000 to the LHPVOL and RHPVOL bits. The

user is also able to simultaneously load the volume control of

both channels by writing to the LRHPBOTH (Register R2, Bit D8)

and RLHPBOTH (Register R3, Bit D8) bits of the left- and right-

channel DAC volume registers.

The maximum output level of the headphone outputs is 1.0 V rms

when AVDD and HPVDD = 3.3 V. To suppress audible pops

and clicks, the headphone and line outputs are held at the

VMID dc voltage level when the device is set to standby mode

or in the event that the headphone outputs are muted.

The stereo line outputs of the SSM2602, the LOUT and

ROUT pins, are able to drive a load impedance of 10 kΩ and

50 pF. The line output signal levels are not adjustable at the output

mixer, having a fixed gain of 0 dB. The maximum output level

of the line outputs is 1.0 V rms when AVDD = 3.3 V.

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