ADE7166 datasheet(107/144 Pages) AD

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ADE7566/ADE7569/ADE7166/ADE7169

Rev. A | Page 107 of 144

The sequence for writing the protection bits is as follows:

PROTECTING THE FLASH MEMORY

Set up the EADRH, EADRL, PROTB1, and PROTB0

registers with the write/erase protection bits. When erased,

the protection bits default to 1 (like any other bit of flash

memory). The default protection setting is for no protection.

To enable protection, write a 0 to the bits corresponding to

the pages that should be protected.

Two forms of protection are offered for this flash memory: read

protection and write/erase protection. The read protection ensures

that any pages that are read protected are not able to be read by

the end user. The write protection ensures that the flash memory

cannot be erased or written over. This protects the end system

from tampering and can prevent the code from being overwritten

in the event of a unexpected disruption of the normal execution

of the program.

Set up the PROTR register with the read protection bits.

Note that every read protection bit protects four pages.

To enable the read protection bit, write a 0 to the bits that

should be read protected.

Write/erase protection is individually selectable for all 32 pages.

Read protection is selected in groups of 4 pages (see Figure 92

for the groupings). The protection bits are stored in the last

flash memory locations, Address 0x3FFA through Address

0x3FFF (see

To enable the protection key, write to the PROTKY register.

If enabled, the protection key is required to modify the

protection scheme. The protection key, Flash Memory

Address 0x3FFA, defaults to 0xFF; if the PROTKY register

is not written to, it remains 0xFF. If the protection key is

written to, the PROTKY register must be written with this

value every time the protection functionality is accessed.

Note that once the protection key is configured, it cannot

be modified. Also note that the most significant bit of

Address 0x3FFA is used to enable a lock mechanism for

the watchdog settings (see the

Figure 94); four bytes are reserved for write/erase

protection, one byte is for read protection, and another byte sets

the protection security key. The user must enable read and

write/erase protection for the last page for the entire protection

scheme to work.

Note that the read protection does not prevent MOVC

commands from being executed within the code.

Watchdog Timer section

for more information).

There is an additional layer of protection offered by a protection

security key. The user can set up this security key so that the

protection scheme cannot be changed without this key. Once

the protection key has been configured, it cannot be modified.

Run the protection command by writing 0x08 to the

ECON register.

Reset the chip to activate the new protection.

Enabling Flash Protection by Code

To enable read and write/erase protection for the last page only,

use the following 8052 code. Writing the flash protection

command to the ECON register initiates programming of the

protection bits in the flash.

The protection bytes in the flash memory can be programmed

using the flash controller command and programming ECON to

0x08. In this case, the EADRH, EADRL, PROTB1, and PROTB0

bytes are used to store the data to be written to the 32 bits of

write protection. Note that the EADRH and EADRL registers

are not used as data pointers here but to store write protection

data.

; enable read protection on the last four

pages only

MOV PROTR,#07Fh

PROTR

PROTKY

PROTB0

PROTB1

EADRL

EADRH

31:28

27:24

23:20

19:16

15:12

11:8

7:4

3:0

PROTECTION KEY

0x3FFF

0x3FFE

0x3FFD

0x3FFC

0x3FFB

0x3FFA

0x3FF9

0x3E00

WDOG

LOCK

; set up a protection key of 0A3h. This

command can be

; omitted to use the default protection key

of 0xFF

MOV PROTKY,#0A3h

; write the flash key to the FLSHKY register

to enable flash

; access. The flash access key is not

configurable.

MOV FLSHKY,#3Bh

; write flash protection command to the ECON

Figure 94. Flash Protection in Page 31

MOV ECON,#08h

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