| 数据搜索系统,热门电子元器件搜索 |
|
ST20-GP1 数据表(PDF) 63 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST20-GP1 数据表(HTML) 63 Page - STMicroelectronics |
|
63 / 116 page ![]() ST20-GP1 63/116 ® Watchdog timer The low power alarm counter is set to operate as a watchdog timer by setting the WdEnable register to 1. This disables entering low power mode when starting the timer. The low power alarm is programmed and started as normal. The WdFlag register can be read to determine if the device was reset by the notRST input or by a watchdog time-out. When the low power alarm counts down to the value #1, the notWdReset pin is asserted low for 1 low power clock cycle. In addition an internal reset of the ST20-GP1 is performed. 10.3 Low power configuration registers The low power controller is allocated a 4k block of memory in the internal peripheral address space. Information on low power mode is stored in registers as detailed in the following section. The registers can be examined and set by the devlw (device load word) and devsw (device store word) instructions, see Table 6.19 on page 43. Note, they can not be accessed using memory instructions. LPTimerLS and LPTimerMS The LPTimerLS and LPTimerMS registers are the least significant word and most significant word of the LPTimer register. This enables the least significant or most significant word to be written independently without affecting the other word. Table 10.2 LPTimerLS register format Table 10.3 LPTimerMS register format When the LPTimer register is written, the low power timer is stopped and the new value is available to be written to the low power timer. LPTimerStart A write to the LPTimerStart register starts the low power timer counter. The counter is stopped and the LPTimerStart register reset if either counter word (LPTimerLS and LPTimerMS) is written. Note, setting the LPTimerStart register to zero does not stop the timer. Table 10.4 LPTimerStart register format LPTimerLS LPC base address + #400 Read/Write Bit Bit field Function 31:0 LPTimerLS Least significant word of the low power timer. LPTimerMS LPC base address + #404 Read/Write Bit Bit field Function 31:0 LPTimerMS Most significant word of the low power timer. LPTimerStart LPC base address + #408 Write Bit Bit field Function 0 LPTimerStart A write to this bit starts the low power timer counter. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |