ST92141 datasheet(146/179 Pages) STMICROELECTRONICS

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ST92141 - SERIAL PERIPHERAL INTERFACE (SPI)

SERIAL PERIPHERAL INTERFACE (Cont’d)

STATUS REGISTER (SPSR)

R242 - Read Only

Reset Value: 0000 0000 (00h)

Bit 7 = SPIF

Serial Peripheral data transfer flag.

This bit is set by hardware when a transfer has

been completed. An interrupt is generated if

SPIE=1 in the CR register. It is cleared by a soft-

ware sequence (an access to the SR register fol-

lowed by a read or write to the DR register).

0: Data transfer is in progress or has been ap-

proved by a clearing sequence.

1: Data transfer between the device and an exter-

nal device has been completed.

Note: While the SPIF bit is set, all writes to the DR

Bit 6 = WCOL

Write Collision status.

This bit is set by hardware when a write to the DR

cleared by a software sequence (see Figure 76).

0: No write collision occurred

1: A write collision has been detected

Bit 5 = Unused.

Bit 4 = MODF

Mode Fault flag.

This bit is set by hardware when the SS pin is

pulled low in master mode (see Section 7.5.4.5

Master Mode Fault). An SPI interrupt can be gen-

erated if SPIE=1 in the CR register. This bit is

cleared by a software sequence (An access to the

SR register while MODF=1 followed by a write to

the CR register).

0: No master mode fault detected

1: A fault in master mode has been detected

Bits 3:0 = Unused.

PRESCALER REGISTER (SPPR)

R243 - Read/Write

Reset Value: 0000 0000 (00h)

Bits 7:5 = Reserved, forced by hardware to 0.

Bit 4 = DIV2

Divider enable.

This bit is set and cleared by software.

0: Divider by 2 enabled.

1: Divider by 2 disabled.

Bit 3 = Reserved. forced by hardware to 0.

Bits 2:0 = PRS[2:0]

Prescaler Value.

These bits are set and cleared by software. The

baud rate generator is driven by

INTCLK/(n1*n2*n3) where n1= PRS[2:0]+1, n2 is

the value of the SPR[1:0] bits, n3 = 1 if DIV2=1

and n3= 2 if DIV2=0. Refer to Figure 73.

These bits have no effect in slave mode.

Table 29. Prescaler Baud Rate

SPIF

WCOL

MODF

----

DIV2

PRS2

PRS1

PRS0

Prescaler

Division Factor

PRS2

PRS1

PRS0

1 (no division)

...

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