C167CS-4RM datasheet(97/517 Pages) INFINEON

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C167CS

Derivatives

Interrupt and Trap Functions

User’s Manual

5-14

V2.0, 2000-07

Continuous transfers are selected by the value FFH in bit field COUNT. In this case

COUNT is not modified and the respective PEC channel services any request until it is

disabled again.

When COUNT is decremented from 01H to 00H after a transfer, the request flag is not

cleared, which generates another request from the same source. When COUNT already

contains the value 00H, the respective PEC channel remains idle and the associated

interrupt service routine is activated instead. This allows to choose, if a level 15 or 14

request is to be serviced by the PEC or by the interrupt service routine.

Note: PEC transfers are only executed, if their priority level is higher than the CPU level,

i.e. only PEC channels 7 … 4 are processed, while the CPU executes on level 14.

All interrupt request sources that are enabled and programmed for PEC service

should use different channels. Otherwise only one transfer will be performed for

all simultaneous requests. When COUNT is decremented to 00H, and the CPU is

to be interrupted, an incorrect interrupt vector will be generated.

The source and destination pointers specifiy the locations between which the data is

to be moved. A pair of pointers (SRCPx and DSTPx) is associated with each of the 8

PEC channels. These pointers do not reside in specific SFRs, but are mapped into the

internal RAM of the C167CS just below the bit-addressable area (see Figure 5-2).

Figure 5-2

Mapping of PEC Pointers into the Internal RAM

MCA04331

DSTP7

SRCP7

DSTP6

SRCP6

DSTP5

SRCP5

DSTP4

SRCP4

00’FCFE

00’FCFC

00’FCFA

00’FCF8

00’FCF6

00’FCF4

00’FCF2

00’FCF0

DSTP3

SRCP3

DSTP2

SRCP2

DSTP1

SRCP1

DSTP0

SRCP0

00’FCEE

00’FCEC

00’FCEA

00’FCE8

00’FCE6

00’FCE4

00’FCE2

00’FCE0

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