C167CS-4RM datasheet(23/517 Pages) INFINEON

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C167CS

Derivatives

Architectural Overview

User’s Manual

2-6

V2.0, 2000-07

Consistent and Optimized Instruction Formats

To obtain optimum performance in a pipelined design, an instruction set has been

designed which incorporates concepts from Reduced Instruction Set Computing (RISC).

These concepts primarily allow fast decoding of the instructions and operands while

reducing pipeline holds. These concepts, however, do not preclude the use of complex

instructions, which are required by microcontroller users. The following goals were used

to design the instruction set:

1. Provide powerful instructions to perform operations which currently require

sequences of instructions and are frequently used. Avoid transfer into and out of

temporary registers such as accumulators and carry bits. Perform tasks in parallel

such as saving state upon entry into interrupt routines or subroutines.

2. Avoid complex encoding schemes by placing operands in consistent fields for each

instruction. Also avoid complex addressing modes which are not frequently used. This

decreases the instruction decode time while also simplifying the development of

compilers and assemblers.

3. Provide most frequently used instructions with one-word instruction formats. All other

instructions are placed into two-word formats. This allows all instructions to be placed

on word boundaries, which alleviates the need for complex alignment hardware. It

also has the benefit of increasing the range for relative branching instructions.

The high performance offered by the hardware implementation of the CPU can efficiently

be utilized by a programmer via the highly functional C167CS instruction set which

includes the following instruction classes:

• Arithmetic Instructions

• Logical Instructions

• Boolean Bit Manipulation Instructions

• Compare and Loop Control Instructions

• Shift and Rotate Instructions

• Prioritize Instruction

• Data Movement Instructions

• System Stack Instructions

• Jump and Call Instructions

• Return Instructions

• System Control Instructions

• Miscellaneous Instructions

Possible operand types are bits, bytes and words. Specific instruction support the

conversion (extension) of bytes to words. A variety of direct, indirect or immediate

addressing modes are provided to specify the required operands.

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