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STLC60135 数据表(PDF) 7 Page - STMicroelectronics

部件名 STLC60135
功能描述  TOSCA ADSL DMT TRANSCEIVER
PDF  25 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STLC60135 数据表(HTML) 7 Page - STMicroelectronics

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PIN SUMMARY (continued)
Mnemonic
Type
BS Type
Signals
Function
ATM UTOPIA Interface
U_RxData
OZ
B
8
Receive interface Data
U_TxData
I
I
8
Transmit interface Data
U_RxADDR
I
I
5
Receive interface Address
U_TxADDR
I
I
5
Transmit interface Address
U_RxCLAV
OZ
O
1
Receive interface Cell Available
U_TxCLAV
OZ
O
1
Transmit interface Cell Available
U_RxENBB
I-TTL
I
1
Receive interface Enable
U_TxENBB
I-TTL
I
1
Transmit interface Enable
U_RxSOC
OZ
O
1
Receive interface Start of Cell
U_TxSOC
I-TTL
I
1
Transmit interface Start of Cell
U_RxCLK
I-TTL
C
1
Receive interface Utopia Clock
U_TxCLK
I-TTL
C
1
Transmit interface Utopia Clock
U_RxRefB
O
O
1
8kHz reference clock to ATM device
U_TxRefB
I-TTL
I
1
8kHz reference clock from ATM device
ATM SLAP Interface
SLR_VAL_S
O
1
SLR_VAL_F
O
1
SLR_DATA_S
O
2
SLR_DATA_F
O
2
SLT_REQ_S
O
1
SLT_REQ_F
O
1
SLT_DATA_S
I
2
SLT_DATA_F
I
2
SLAP_CLOCK
O
1
SLR_FRAME_I
O
1
SLT_FRAME_I
O
1
SLR_FRAME_F
O
1
SLT_FRAME_F
O
1
Miscellaneous
GP_IN
I-PD
I
2
General purpose input
GP_OUT
O
O
1
General purpose output
RESETB
I
I
I
Hard reset
TESTSE
I
none
none
Enable scan test mode
IDDq
I
none
none
Test pin, active high
I
=
Input, CMOS levels
I-PU
=
Input with pull-up resistance, CMOS levels
I-PD
=
Input with pull-down resistance, CMOS levels
I-TTL
=
Input TTL levels
O
=
Push-pull output
OZ
=
Push-pull output with high-impedance state
IO
=
Input / Tristate Push-pull output
BS cell
=
Boundary-Scan cell
I
=
Input cell
O
=
Output cell
B
=
Bidirectional cell
C
=
Clock
STLC60135
7/25



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