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STLC60135 数据表(PDF) 6 Page - STMicroelectronics

部件名 STLC60135
功能描述  TOSCA ADSL DMT TRANSCEIVER
PDF  25 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STLC60135 数据表(HTML) 6 Page - STMicroelectronics

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PIN FUNCTIONS (continued)
Pin
Name
Type Supply
Driver
BS
Function
139
AFTXD_0
O
VDD
BT4CR
O
Transmit data nibble
140
AFTXD_1
O
VDD
BT4CR
O
Transmit data nibble
141
VSS
0V Ground
142
AFTXD_2
O
VDD
BT4CR
O
Transmit data nibble
143
AFTXD_3
O
VDD
BT4CR
O
Transmit data nibble
144
VDD
(VSS + 3.3V) Power Supply
I/O DRIVER FUNCTION
Driver
Function
BD4CR
CMOS bidirectional, 4mA, slew rate control
BD8SCR
CMOS bidirectional, 8mA, slew rate control, Schmitt trigger
IBUF
CMOS input
IBUFDQ
CMOS input, pull down, IDDq control
IBUFUQ
CMOS input, pull up, IDDq control
PIN SUMMARY
Mnemonic
Type
BS Type
Signals
Function
Power Supply
VDD
(VSS + 3.3V) Power Supply
VSS
0V Ground
ATC Interface
ALE
I
C
1
Used to latch the address of the internal register to be accessed
PCLK
I
I
1
Processor clock
CSB
I
I
1
Chip selected to respond to bus cycle
BE1
I
I
1
Address 1 (not multiplexed)
WR_RDB
I
I
1
Specifies the direction of the access cycle
RDYB
OZ
O
1
Controls the ATC bus cycle termination
INTB
O
O
1
Requests ATC interrupt service
AD
IO
B
16
Multiplexed Address/Data bus
OBC_TYPE
I-PD
I
1
Select between i960 (0) or generic (1) controller interface
Test Access Part Interface
TDI
I-PU
1
refer to section
TDO
OZ
1
TCK
I-PD
1
TMS
I-PU
1
TRSTB
I-PD
1
Analog Front End Interface
AFRXD
I
I
4
Receive data nibble
AFTXD
O
O
4
Transmit data nibble
AFTXED
O
O
4
Transmit echo nibble
CLWD
I
I
1
Start of word indication
PDOWN
O
O
1
Power down analog front end
CTRLDATA
O
O
1
Serial data transmit channel
MCLK
I
C
1
Master clock
STLC60135
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