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M32C/8A 数据表(PDF) 75 Page - Renesas Technology Corp |
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M32C/8A 数据表(HTML) 75 Page - Renesas Technology Corp |
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75 / 372 page ![]() M32C/8A Group 8. Bus Rev.1.00 Jul 15, 2007 Page 58 of 352 REJ09B0385-0100 Figure 8.5 Bus Cycles when Separate Bus is Selected (2) • Bus cycle 2 φ + 2 φ BCLK Address CSi Read data Write data RD WR, WRL, WRH • Bus cycle 2 φ + 3 φ • Bus cycle 2 φ + 4 φ BCLK Address CSi Read data Write data RD WR, WRL, WRH BCLK Address CSi Read data Write data RD WR, WRL, WRH (1) (1) (1) 1 bus cycle = 5 φ 1 bus cycle = 6 φ 1 bus cycle = 4 φ NOTE: 1. When the MCU accesses the same CS area consecutively, the CSi pin keeps outputting "L". i = 0 to 3 |
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