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M32C/8A 数据表(PDF) 24 Page - Renesas Technology Corp |
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M32C/8A 数据表(HTML) 24 Page - Renesas Technology Corp |
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24 / 372 page ![]() M32C/8A Group 1. Overview Rev.1.00 Jul 15, 2007 Page 7 of 352 REJ09B0385-0100 1.3 Block Diagram Figure 1.2 shows a M32C/8A Group block diagram. Figure 1.2 M32C/8A Group Block Diagram Port P0 8-bit D/A converters: 2 circuits Serial Interface: 5 channels clock synchronous/ asynchronous X/Y converter: 16 bits × 16 bits CRC calculation circuit X16 + X12 + X5 + 1 (CCITT) 10-bit A/D converter: 1 circuit, 18 input(3) Port P13 Port P12 Port P11 RAM Multiplier FLG ISP INTB USP PC SVF SVP VCT <VCC2> <VCC1> <VCC2> Internal peripheral functions Memory R0H R0L R2 M32C/80 Series CPU core Port P1 Port P2 Port P3 Port P4 Port P5 Port P6 Port P7 Watchdog timer (15 bits) Clock generation circuits: XIN-XOUT XCIN-XCOUT On-chip oscillator PLL frequency synthesizer DMAC: 4 channels DMAC II Three-phase motor control circuit Timers (16-bit) Output (timer A): 5 Input (timer B): 6 R1H R1L R3 FB SB A0 A1 8 8 8 8 8 8 8 8 8 8 5 Port P15 Port P14 Port P10 <VCC1> 8 8 7 Port P9 8 P8_5 Port P8 7 NOTES: 1. Ports P11 to P15 are provided in the 144-pin package only. 2. Ports P0 to P5 function as bus control pins when using in microprocessor mode . Port P1 can function as I/O port when using with 8-bit external bus width only. 3. 18 channels are available in the 144-pin package. 10 channels are available in the 100-pin package. (2) (2) (2) (2) (2) (2) (1) (1) (1) (1) (1) |
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