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M32C/8A 数据表(PDF) 97 Page - Renesas Technology Corp |
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M32C/8A 数据表(HTML) 97 Page - Renesas Technology Corp |
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97 / 372 page ![]() M32C/8A Group 9. Clock Generation Circuits Rev.1.00 Jul 15, 2007 Page 80 of 352 REJ09B0385-0100 9.1.3 On-Chip Oscillator Clock On-chip oscillator generates the 1-MHz on-chip oscillator clock. The on-chip oscillator clock is used as the clock source for the CPU clock and peripheral function clocks. The on-chip oscillator clock is stopped after reset. When the CM21 bit in the CM2 register is set to 1 (on-chip oscillator clock), the on-chip oscillator starts oscillating and becomes the clock source for the CPU clock and peripheral function clocks in place of the main clock. Table 9.2 lists on-chip oscillator start conditions. Table 9.2 On-Chip Oscillator Start Condition 9.1.3.1 Oscillation Stop Detect Function When the main clock is terminated running by an external factor, the on-chip oscillator automatically starts oscillating. When the CM 20 bit in the CM2 register is set to 1 (oscillation stop detect function used), an oscillation stop detection interrupt request is generated as soon as the main clock is lost. Simultaneously, the on-chip oscillator starts oscillating. The on-chip oscillator clock takes the place of the main clock as the clock source for the CPU clock and peripheral function clocks. Associated bits in the CM2 register are changed as follows: • CM21 bit becomes 1 (on-chip oscillator clock becomes the CPU clock) • CM22 bit becomes 1 (loss of main clock stop is detected) • CM23 bit becomes 1 (main clock stops) The oscillation stop detection interrupt shares the vector with the watchdog timer interrupt and the Vdet4 detection interrupt. When these interrupts are used simultaneously, verify the CM22 bit within an interrupt routine to determine if an oscillation stop detection interrupt request has been generated. When the main clock resumes its operation after a loss of the main clock is detected, the main clock can be selected as the clock source for the CPU clock and peripheral function clocks by program. Figure 9.11 shows the procedure to switch the clock source from the on-chip oscillator clock to the main clock. In low-speed mode, when the main clock is lost while the CM20 bit is set to 1, an oscillation stop detection interrupt request is generated, and the on-chip oscillator starts oscillating. The sub clock remains as the source for the CPU clock. The on-chip oscillator clock becomes the source for the peripheral function clocks. When the peripheral function clocks are stopped, the oscillation stop detect function cannot be used. To enter wait mode while using the oscillation stop detect function, set the CM02 bit in the CM0 register to 0 (peripheral clocks do not stop in wait mode). The oscillation stop detect function is a precaution against the unintended termination of the main clock by an external factor. Set the CM20 bit to 0 (oscillation stop detect function not used) when the main clock is stopped by program, i.e., entering stop mode or setting the CM05 bit in the CM0 register to 1 (main clock stops). When the main clock frequency is 2 MHz or lower, the oscillation stop detect function is not available. In this case, set the CM20 bit to 0. CM2 Register PM2 Register Applications CM21 PM22 PM27, PM26 1 0 00b Clock source for the CPU clock and peripheral function clock 0 1 00b Count source for the watchdog timer (The clock keeps running in stop mode.) 0 0 10b Clock source for f2n |
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