M32CSLASH86 datasheet(356/505 Pages) RENESAS

356 / 505 page

Page 333

23. CAN Module

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When using the CAN interrupt, the CiSISTR register (i=0, 1) indicates which message slot is requesting

an interrupt. The SISj bits (j=0 to 15) are not automatically set to "0" (no interrupt requested) when an

interrupt is acknowledged. Set the SISj bits to "0" by program.

Use the MOV instruction, instead of the bit clear instruction, to set the SISj bits to "0". The SISj bits,

which are not being changed to "0", must be set to "1".

For example: To set the SIS0 bit to "0"

Assembly language:

mov.w

#07FFFh, C0SISTR

C language: c0sistr = 0x7FFF;

Refer to 23.4 CAN Interrupt for details.

23.1.11.1 Message Slot for Transmission

The SISj bit is set to "1" (interrupt requested) when the CiTSR register is stored into the message slot j

after data transmission is completed.

23.1.11.2 Message Slot for Reception

The SISj bit is set to "1" (interrupt requested) when the received message is stored in the message slot j

after data reception is completed.

NOTES:

1.If the automatic answering function is enabled in the remote frame receive message slot, the

SISj bit is set to "1" after the remote frame is received and the data frame is transmitted.

2.In the remote frame transmit message slot, the SISj bit is set to "1" after the remote frame is

transmitted and the data frame is received.

3.The SISj bit is set to "1" if the SISj bit is set to "1" by an interrupt request and "0" by program

simultaneously.

M32C/86 数据表(PDF) 356 Page - Renesas Technology Corp