M32CSLASH86 datasheet(80/505 Pages) RENESAS

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8. Bus

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8.2 Bus Control

Signals, required to access external devices, are provided and software wait states are inserted as follows.

The signals are available in memory expansion mode and microprocessor mode only.

8.2.1 Address Bus and Data Bus

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Address bus is a signal accessing 16-Mbyte space and uses 24 control pins; A0 to A22 and A23. A23 is the

inversed output signal of the highest-order address bit.

Data bus is a signal for data input and output. The DS register selects an 8-bit data bus from D0 to D7 or

a 16-bit data bus from D0 to D15 for each external space. When applying a high-level ("H") signal to the

BYTE pin, the data bus accessing the external memory space 3 becomes an 8-bit data bus after reset.

When applying a low-level ("L") signal to the BYTE pin, the data bus accessing the external memory

space 3 becomes the 16-bit data bus.

When changing single-chip mode to memory expansion mode, the address bus is in an indeterminate

state until the microcomputer accesses an external memory space.

8.2.2 Chip-Select Signal

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Chip-select signal shares pins with A20 to A22 and A23. The PM11 and PM10 bits in the PM1 register

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determine which CS area is accessed and how many chip-select signals are output. A maximum of four

chip-select signals can be output.

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In microprocessor mode, no chip-select signal, aside from A23 which can perform as a chip-select signal,

is output after reset.

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The chip-select signal becomes "L" while the microcomputer is accessing the external CSi area (i=0 to 3).

It becomes "H" while the microcomputer is accessing other external memory space.

Figure 8.2 shows an example of the address bus and chip-select signal output.

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