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M32C/86 数据表(PDF) 92 Page - Renesas Technology Corp

部件名 M32C/86
功能描述  RENESAS 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  505 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

M32C/86 数据表(HTML) 92 Page - Renesas Technology Corp

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(1) Separate Bus with 2 Wait States
(2) Multiplexed Bus with 2 Wait States
BCLK
RD
CSi
(i=0 to 3)
RDY
BCLK
RD
CSi
(i=0 to 3)
RDY
tsu(RDY - BCLK)
1st cycle
2nd cycle
3rd cycle
4th cycle
tsu(RDY - BCLK)
Timing to receive RDY
tsu(RDY-BCLK): Setup time for RDY input
Timing to receive RDY for j wait(s): j+1 cycles (j = 1 to 3)
1st cycle
2nd cycle
3rd cycle
4th cycle
: Wait states inserted by RDY
: Wait states inserted by program
(1)
(1)
NOTES:
1. The chip-select signal (CSi) may be output longer depending on CPU state such as the instruction
queue buffer.
Timing to receive RDY
_____
________
Figure 8.11 RD Signal Output Extended by RDY Signal



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