M32CSLASH86 datasheet(410/505 Pages) RENESAS

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Page 387

24. Programmable I/O Ports

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Table 24.1 Unassigned Pin Settings in Single-Chip Mode

Pin Name

Setting

P0 to P15

Enter input mode and connect each pin to VSS via a resistor (pull-down);

(excluding P85)(1,2,3)

or enter output mode and leave the pins open

XOUT(5)

Leave pin open

_______

NMI(P85)

Connect pin to VCC via a resistor (pull-up)

AVCC

Connect pin to VCC

AVSS, VREF, BYTE

Connect pins to VSS

NOTES:

1. If the port enters output mode and is left open, it is in input mode before output mode is entered by

program after reset. While the port is in input mode, voltage level on the pins is indeterminate and

power consumption may increase.

Direction register settings may be changed by noise or failure caused by noise. Configure direction

2. Use the shortest possible wiring to connect the microcomputer pins to unassigned pins (within 2 cm).

3. P70 and P71 must put in low-level ("L") signal outputs if they are in output mode. They are ports for

the N-channel open-drain output.

4. When the external clock is applied to the XIN pin, set the pin as written above.

Table 24.2 Unassigned Pin Setting in Memory Expansion Mode and Microprocessor Mode

Pin Name

Setting

P6 to P15

Enter input mode and connect each pin to VSS via a resistor (pull-down);

(excluding P85)(1,2,3)

or enter output mode and leave the pins open

_________

BHE, ALE, HLDA,

Leave pin open

XOUT(5), BCLK

_______

__________ _______

RDY, HOLD, NMI(P85)

Connect pins to VCC via a resistor (pull-up)

AVCC

Connect pin to VCC

AVSS, VREF

Connect pins to VSS

NOTES:

1. If the port enters output mode and is left open, it is in input mode before output mode is entered by

program after reset. While the port is in input mode, voltage level on the pins is indeterminate and

power consumption may increase.

Direction register settings may be changed by noise or failure caused by noise. Configure direction

2. Use the shortest possible wiring to connect the microcomputer pins to unassigned pins (within 2 cm).

3. P70 and P71 must put in low-level ("L") signal outputs if they are in output mode. They are ports for

the N-channel open-drain output.

4. When the external clock is applied to the XIN pin, set the pin as written above.

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