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M32C/86 数据表(PDF) 158 Page - Renesas Technology Corp |
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M32C/86 数据表(HTML) 158 Page - Renesas Technology Corp |
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158 / 505 page ![]() Page 135 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 13. DMAC ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M CPU Clock DMA0 DMA1 DRQ Bit in DMA0 Register DRQ Bit in DMA1 Register CPU INT0 INT1 When DMA transfer request signals by external source are applied to INT0 and INT1 simultaneously and a DMA transfer with minimum cycle occurs Bus privilege acquired Figure 13.7 DMA Transfer by External Source |
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