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M32C/86 数据表(PDF) 246 Page - Renesas Technology Corp |
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M32C/86 数据表(HTML) 246 Page - Renesas Technology Corp |
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246 / 505 page ![]() Page 223 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 17. Serial I/O (Special Function) ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M Table 17.25 Register Settings in GCI Mode Register Bit Function UiTB 7 to 0 Set transmit data UiRB 7 to 0 Received data OER Overrun error flag UiBRG 7 to 0 Set to "0016" UiMR SMD2 to SMD0 Set to "0012" CKDIR Set to "1" IOPOL Set to "0" UiC0 CLK1, CLK0 Set to "002" CRS Disabled because the CRD bit is set to "1" TXEPT Transfer register empty flag CRD Set to "1" NCH Select the output format of the TxDi pin CKPOL Set to "0" UFORM Set to "0" UiC1 TE Set to "1" to enable data transmission and reception TI Transfer buffer empty flag RE Set to "1" to enable data reception RI Reception complete flag UiIRS Select what causes the UARTi transmit interrupt to be generated UiRRM, UiLCH Set to "0" SCLKSTPB Set to "0" UiSMR 6 to 0 Set to "00000002" SCLKDIV See Table 17.29 UiSMR2 6 to 0 Set to "00000002" SU1HIM See Table 17.29 UiSMR3 2 to 0 Set to "0002" NODC Set to "0" 7 to 4 Set to "00002" UiSMR4 7 to 0 Set to "0016" i=0 to 4 |
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