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M32C/86 数据表(PDF) 263 Page - Renesas Technology Corp |
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M32C/86 数据表(HTML) 263 Page - Renesas Technology Corp |
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263 / 505 page ![]() Page 240 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 18. A/D Converter ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M Function A/D0 Control Register 2(1) Bit Name Bit Symbol Symbol Address After Reset AD0CON2 039416 XX0X X0002 RW RW RW RW RW RW SMP APS0 APS1 (b4 - b3) (b7 - b6) TRG0 A/D Conversion Method Select Bit Analog Input Port Select Bit(2, 3) 0 : Without the sample and hold funtion 1 : With the sample and hold function External Trigger Request Cause Select Bit 0 : Selects ADTRG 1 : Selects a timer B2 interrupt request of the three-phase motor control timer functions (after the ICTB2 counter completes counting) b2b1 0 0 : AN0 to AN7, ANEX0, ANEX1 0 1 : AN150 to AN157 1 0 : AN00 to AN07 1 1 : AN20 to AN27 NOTES: 1. When the AD0CON2 register is rewritten during the A/D conversion, the conversion result is indeterminate. 2. When the MSS bit in the AD0CON3 register is set to "1" (multi-port sweep mode enabled), set the APS1 and APS0 bits to "012". 3. The APS1 and APS0 bits can be set to "102" or "112" in single-chip mode only. Nothing is assigned. When write, set to "0". When read, its content is indeterminate. Reserved Bit Set to "0". When read, its content is indeterminate. b7 b6 b5 b4 b3 b2 b1 b0 0 0 Figure 18.4 AD0CON2 Register |
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