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M38C31M7AXXXFS 数据表(PDF) 83 Page - Renesas Technology Corp |
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M38C31M7AXXXFS 数据表(HTML) 83 Page - Renesas Technology Corp |
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83 / 224 page  2-18 38C3 Group User’s Manual APPLICATION 2.2 Timer Fig. 2.2.14 Structure of Interrupt control register 1 Fig. 2.2.15 Structure of Interrupt control register 2 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled Interrupt control register 1 b7 b6 b5 b4 b3 b2 b1 b0 Interrupt control register 1 (ICON1 : address 3E16) b 0 1 2 3 4 5 6 7 Name 0 Functions At reset R W 0 0 0 0 INT0 interrupt enable bit INT1 interrupt enable bit Serial I/O interrupt enable bit Timer A interrupt enable bit Timer 1 interrupt enable bit Timer 2 interrupt enable bit INT2 interrupt enable bit 0 : Interrupt disabled 1 : Interrupt enabled Timer 3 interrupt enable bit 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 0 0 Interrupt control register 2 b7 b6 b5 b4 b3 b2 b1 b0 Interrupt control register 2 (ICON2 : address 3F16) b 0 1 2 4 Name 0 Functions At reset R W 0 0 0 0 Timer 5 interrupt enable bit CNTR0 interrupt enable bit CNTR1 interrupt enable bit Timer 6 interrupt enable bit 0 : Interrupt disabled 1 : Interrupt enabled 0 : interrupt disabled 1 : Interrupt enabled 0 : interrupt disabled 1 : Interrupt enabled 0 : interrupt disabled 1 : Interrupt enabled 0 : interrupt disabled 1 : Interrupt enabled 5 0 Key input interrupt enable bit 0 : interrupt disabled 1 : Interrupt enabled 6 7 0 AD conversion interrupt enable bit 0 : interrupt disabled 1 : Interrupt enabled 0 Timer 4 interrupt enable bit Nothing is arranged for this bit. This is a write disabled bit. When this bit is read out, the contents are “0”. 3 |
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