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ADATE305 数据表(PDF) 37 Page - Analog Devices

部件名 ADATE305
功能描述  250 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH
PDF  56 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADATE305 数据表(HTML) 37 Page - Analog Devices

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ADATE305
Rev. 0 | Page 37 of 56
READ OPERATION
The read operation is a two-stage operation. First, a word is
shifted in, specifying which register to read. CS is deasserted
for three clock cycles, and then a second word is shifted in to
obtain the readback data. This second word can be either
another operation or an NOP address. If another operation is
shifted in, it needs to shift in at least eight bits of data to read
back the previous specified data. The NOP address can be used
for this read if there is no need to write/read another register. To
maintain the clarity of the operation, it is strongly recommended
that the NOP address be used for all reads.
Any register read that is fewer than 16 bits has zeroes filled in
the top bits to make it a 16-bit word.
X
X
READ INSTRUCTION
NOP
XREAD DATA
X
SCLK
INPUT
SDIN
INPUT
SDOUT
OUTPUT
CS
INPUT
NOTES
1. X = DON’T CARE.
Figure 75. SPI Read Overview
X
DATA[15:0], VALUE IS A DON’T CARE
0
25
24
23
22
21
20
19
18
17
16
15
14
13
12
CH[1]
X
R/W
CH[0]
ADDR[4] ADDR[3] ADDR[2] ADDR[1] ADDR[0]
SCLK
INPUT
SDIN
INPUT
SDOUT
OUTPUT
CS
INPUT
NOTES
1. X = DON’T CARE.
Figure 76. SPI Read—Details of Read Request
X
DATA[15:0], VALUE IS A DON’T CARE
0
25
24
23
22
21
20
19
18
17
16
15
14
13
12
CH[1]
RDATA[15]
RDATA[2]
RDATA[1]
RDATA[0]
RDATA[14]
X
R/W = 1
ADDR[4:0] = 0x00 (NOP)
CH[0]
SCLK
INPUT
SDIN
INPUT
SDOUT
OUTPUT
CS
INPUT
NOTES
1. RDATA IS THE REGISTER VALUE BEING READ.
2. X = DON’T CARE.
Figure 77. SPI Read—Details of Read Out



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