ADATE305 datasheet(28/56 Pages) AD

部件名	ADATE305

功能描述	250 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH

PDF	56 Pages

Scroll/Zoom	100%

制造商	AD [Analog Devices]

网页	http://www.analog.com

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28 / 56 page

ADATE305

Rev. 0 | Page 28 of 56

1.6

1.2

0.8

0.4

0.6

1.2

1.8

2.4

3.0

TIME (ns)

RISE INPUT

FALL INPUT

RISE SHMOO

FALL SHMOO

Figure 33. Comparator Shmoo, 1.5 V Input, 1.0 ns (10% to 90%) Input,

50 Ω Terminated

1.6

1.2

0.8

0.4

0.6

1.2

1.8

2.4

3.0

TIME (ns)

RISE INPUT

FALL INPUT

RISE SHMOO

FALL SHMOO

Figure 34. Comparator Shmoo, 1.5 V Input, 0.625 ns (10% to 90%) Input,

50 Ω Terminated

–10

–20

–30

–40

–50

–60

–70

–80

PULSEWIDTH (ns)

9 10

1V NEG

1V POS

Figure 35. Comparator Minimum Pulse Width, 1.0 V

100

–25

–50

0.5

1.0

1.5

2.0

2.5

INPUT SLEW RATE (10%-90%) (ns)

RISING

FALLING

TOTAL

Figure 36. Comparator Slew Rate Dispersion, Input Swing = 1.5 V,

Comparator Threshold = 0.75 V

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

TIME (ns)

COMP_QH0N

COMP_QH0P

Figure 37. Comparator Output Waveform, COMP_QH0P, COMP_QH0N

0.8

0.6

0.4

0.2

–0.2

–0.4

–0.6

–0.8

–1.2

–1.0

–1.4

–2

–1

012

PROGRAMMED THRESHOLD VOLTAGE (V)

Figure 38. Comparator Threshold Linearity

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