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ADATE305 数据表(PDF) 16 Page - Analog Devices

部件名 ADATE305
功能描述  250 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH
PDF  56 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADATE305 数据表(HTML) 16 Page - Analog Devices

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ADATE305
Rev. 0 | Page 16 of 56
Parameter
Min
Typ
Max
Unit
Test
Level
Conditions/Comments
Current Force Settling Time to
0.1% of Final Value
PMU enabled, FI, PE disabled, start with PMUDAC
programmed to 0 current, program PMUDAC to FS current
Range A, 200 pF in Parallel
with 120 Ω
8.2
μs
S
Range B, 200 pF in Parallel
with 1.5 kΩ
9.4
μs
S
Range C, 200 pF in Parallel
with 15.0 kΩ
30
μs
S
Range D, 200 pF in Parallel
with 150 kΩ
281
μs
S
Range E, 200 pF in Parallel
with 1.5 MΩ
2668
μs
S
Current Force Settling Time to
1.0% of Final Value:
PMU enabled, FI, PE disabled, start with PMUDAC
programmed to 0 current, program PMUDAC to FS current
Range A, 200 pF in Parallel
with 120 Ω
4.2
μs
CB
Range B, 200 pF in Parallel
with 1.5 kΩ
4.3
μs
CB
Range C, 200 pF in Parallel
with 15.0 kΩ
8.1
μs
CB
Range D, 200 pF in Parallel
with 150 kΩ
205
μs
CB
Range E, 200 pF in Parallel
with 1.5 MΩ
505
μs
CB
INTERACTION AND CROSSTALK
Measure Voltage Channel-to-
Channel Crosstalk
±0.125
%FSR
CT
PMU enabled, FIMV, PE disabled, Range B, forcing 0 mA into
0 V load; other channel: Range A, forcing a step of 0 mA to 25 mA
into 0 V load; report ∆V of MEASOUT01 pin under test;
0.125% × 8.0 V = 10 mV
Measure Current Channel-to-
Channel Crosstalk
±0.01
%FSR
CT
PMU enabled, FVMI, PE disabled, Range E, forcing 0 V into
0 mA current load; other channel: Range E, forcing a step of 0 V
to 5 V into 0 mA current load; report ∆V of MEASOUT01 pin
under test; 0.01% × 5.0 V = 0.5 mV
EXTERNAL SENSE (PMUS_CHX)
Table 8.
Parameter
Min
Typ
Max
Unit
Test
Level
Conditions/Comments
EXTERNAL SENSE (PMUS_CHX)
Voltage Range
−1.5
+6.0
V
D
Input Leakage Current
−20
+20
nA
P
Tested at −1.5 V and +6.0 V
DUTGND INPUT
Table 9.
Parameter
Min
Typ
Max
Unit
Test
Level
Conditions/Comments
DUTGND INPUT
Input Voltage Range, Referenced to GND
−0.1
+0.1
V
D
Input Bias Current
1
100
μA
P
Tested at −100 mV and +100 mV



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