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ADATE305 数据表(PDF) 41 Page - Analog Devices

部件名 ADATE305
功能描述  250 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH
PDF  56 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADATE305 数据表(HTML) 41 Page - Analog Devices

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ADATE305
Rev. 0 | Page 41 of 56
Table 24. PMU Measure Enable (ADDR[4:0] = 0x0F)1
Bit
Name
Description
DATA[2:1]
MEASOUT01 select
00 = PMU MEASOUT Channel 0
01 = PMU MEASOUT Channel 1
10 = Temp sensor ground reference
11 = Temp sensor
DATA[0]
MEASOUT01 output enable
0 = MEASOUT01 is tristated
1 = MEASOUT01 is enabled
1 This register is written to or read from when either of the CH[1:0] bits is 1.
Table 25. Differential Comparator Enable (ADDR[4:0] = 0x10)1
Bit
Name
Description
DATA[0]
Differential Comparator Enable
0 = differential comparator is disabled; the Channel 0 normal window
comparator (NWC) outputs are located on Channel 0
1 = differential comparator is enabled; the differential comparator outputs
are located on Channel 0
1 This register is written to or read from when either of the CH[1:0] bits is 1.
Table 26. DAC16_MON (16-Bit DAC Monitor) (ADDR[4:0] = 0x11)1
Bit
Name
Description
DATA[1]
16-Bit DAC mux enable
0 = 16-bit DAC mux is tristated
1 = 16-bit DAC mux is enabled
DATA[0]
16-Bit DAC mux select
0 = 16-bit DAC Channel 0
1 = 16-bit DAC Channel 1
1 This register is written to or read from when either of the CH[1:0] bits is 1.
Table 27. OVD_CHx Alarm Mask (ADDR[4:0] = 0x12)
Bit
Name
Description
DATA[1]
PMU mask
0 = disable PMU alarm flag
1 = enable PMU alarm flag
DATA[0]
OVD mask
0 = disable OVD alarm flag
1 = enable OVD alarm flag
Table 28. OVD_CHx Alarm State (ADDR[4:0] = 0x13)1
Bit
Name
Description
DATA[2]
PMU clamp flag
0 = PMU is not clamped
1 = PMU is clamped
DATA[1]
OVD high flag
0 = DUT voltage < OVD high voltage
1 = DUT voltage > OVD high voltage
DATA[0]
OVD low flag
0 = DUT voltage > OVD low voltage
1 = DUT voltage < OVD low voltage
1 This register is a read-only register.



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