ADATE305 datasheet(32/56 Pages) AD

部件名	ADATE305

功能描述	250 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH

PDF	56 Pages

Scroll/Zoom	100%

制造商	AD [Analog Devices]

网页	http://www.analog.com

标志

32 / 56 page

ADATE305

Rev. 0 | Page 32 of 56

0.7

0.6

0.5

0.4

0.3

0.2

0.1

–0.1

–0.2

–2

–1

VDUTx (V)

Figure 57. PMU FI Range B Output Current Error at +2 mA vs. Output Voltage;

Output Voltage Is Pulled Externally

0.0015

0.0010

0.0005

–0.0010

–0.0005

–2

–1

012

VDUTx (V)

Figure 58. PMU FI Range E Output Current Error at −2 μA vs. Output Voltage;

Output Voltage Is Pulled Externally

0.0016

0.0014

0.0012

0.0010

0.0008

0.0006

0.0004

0.0002

–0.0002

–2

–1

012

VDUTx (V)

Figure 59. PMU FI Range E Output Current Error at +2 μA vs. Output Voltage;

Output Voltage Is Pulled Externally

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

–2

–1

VDUTx (V)

Figure 60. PMU Measure Current CMRR, Externally Pulling 1 mA, FVMI; Error

of MI vs. External 1 mA

960ps/DIV

Figure 61. Eye Diagram, 200 Mbps, PRBS31; VH = 1.0 V, VL = 0.0 V

400ps/DIV

Figure 62. Eye Diagram, 400 Mbps, PRBS31; VH = 1.0 V, VL = 0.0 V

ADATE305 数据表(PDF) 32 Page - Analog Devices

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