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ADATE305 数据表(PDF) 4 Page - Analog Devices

部件名 ADATE305
功能描述  250 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH
PDF  56 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADATE305 数据表(HTML) 4 Page - Analog Devices

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ADATE305
Rev. 0 | Page 4 of 56
SPECIFICATIONS
Characterization and production tests performed using Power Supply Range 1 (see Table 36). VDD = +10.0 V, VCC = +3.3 V, VSS = −5.25 V,
VPLUS = +16.75 V, VCOMP_VTT = +3.3 V, VREF = +5.0 V, VREF_GND = 0.0 V. All default test conditions are as defined in Table 38. All specified
values are at TJ = 70°C, where TJ corresponds to the internal temperature sensor, unless otherwise noted. Temperature coefficients are
measured at TJ = 70°C ± 20°C, unless otherwise noted. Typical values are based on design, simulation analyses, and/or limited bench
evaluations. Typical values are not tested or guaranteed. Test levels are specified in the Explanation of Test Levels section.
TOTAL FUNCTION
Table 1.
Parameter
Min
Typ
Max
Unit
Test
Level
Conditions/Comments
TOTAL FUNCTION
Output Leakage Current
PE Disable Range E
−20.0
5.3
+20.0
nA
P
−1.5 V < VDUTx < +6.0 V; PMU and PE disabled via SPI; PMU
Range E, VCH = 7.0 V, VCL = −2.5 V
PE Disable Range A, B, C, D
5.3
nA
CT
−1.5 V < VDUTx < +6.0 V; PMU and PE disabled via SPI; PMU
Range A, PMU Range B, PMU Range C, and PMU Range D,
VCH = +7.0 V, VCL = −2.5 V
High-Z Mode
−400
5.4
+400
nA
P
−1.5 V < VDUTx < +6.0 V; PMU disabled and PE enabled via SPI;
RCV active, VCH = +7.0 V, VCL = −2.5 V
Output Capacitance
4
pF
S
VTERM mode operation
DUT Pin Range
−1.5
+6.0
V
D
POWER SUPPLIES
Total Supply Range, VPLUS to VSS
22.5
23.25
V
D
Defines PSRR conditions
VPLUS Supply, VPLUS
16.25
16.75
17.25
V
D
Defines PSRR conditions
Positive Supply, VDD
9.5
10.0
10.5
V
D
Defines PSRR conditions
Negative Supply, VSS
−5.50
−5.25
−5.00
V
D
Defines PSRR conditions
Logic Supply, VCC
3.1
3.3
3.5
V
D
Defines PSRR conditions
Comparator Termination, VCOMP_VTT
3.3
5.0
V
D
VPLUS Supply Current, IPLUS
−1.0
+1.3
+3.0
mA
P
HVOUT disabled
VPLUS Supply Current, IPLUS
4.0
12.7
17.0
mA
P
HVOUT enabled, RCV active, no load, VHH = 12 V
Logic Supply Current, ICC
1.0
2.7
10.0
mA
P
Quiescent (SPI is static)
Comparator Termination Current,
ICOMP_VTT
10.0
17
26.0
mA
P
Positive Supply Current, IDD
72
92
105
mA
P
Load power down (IOH = IOL = 0 mA)
Negative Supply Current, ISS
100
119
135
mA
P
Load power down (IOH = IOL = 0 mA)
Total Power Dissipation
1.0
1.7
1.9
W
P
Load power down (IOH = IOL = 0 mA)
Positive Supply Current, IDD
102
133
154
mA
P
Load active off (IOH = IOL = 12 mA)
Negative Supply Current, ISS
130
158
183
mA
P
Load active off (IOH = IOL = 12 mA)
Total Power Dissipation
1.8
2.2
2.5
W
P
Load active off (IOH = IOL = 12 mA)
TEMPERATURE MONITORS
Temperature Sensor Gain
10
mV/K
CT
Temperature Sensor Accuracy
Without Calibration over
25°C to 100°C
6
°C
CT
Temperature voltage available on Pin 3 at all times and Pin 28
when selected (see Table 24 and Table 36)
VREF INPUT
Reference Input Voltage Range for
DACs (VREF Pin)
4.95
5
5.05
V
D
Referenced to VREF_GND; not referenced to VDUTGND
Input Bias Current
0.1
100
μA
P
Tested with 5 V applied



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