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MPC5633MMLL80 数据表(PDF) 57 Page - Freescale Semiconductor, Inc |
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MPC5633MMLL80 数据表(HTML) 57 Page - Freescale Semiconductor, Inc |
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57 / 106 page ![]() VDDE5 I/O Supply Input — — I VDDE5 I / – — — — T13 VDDEH6a37, 38 VDDEH6b38 I/O Supply Input — — I VDDEH6 (3.3–5.0V) I / – — 78, 93, 61 95, 110, 74 — VDDEH6 I/O Supply Input — — I VDDEH6 I / – — — — F13 VDDEH7 I/O Supply Input — — I VDDEH739 (3.3–5.0 V) I / – — 102, 113 125, 138 D12 VDDE740 I/O Supply Input — — I VDDE7 (3.3 V) I / – — — 16, 1197 E13, P6 1 For each pin in the table, each line in the Function column is a separate function of the pin. For all I/O pins the selection of primary pin function or secondary function or GPIO is done in the SIU except where explicitly noted. 2 Values in this column refer to registers in the System Integration Unit (SIU). The actual register name is “SIU_PCR” suffixed by the PCR number. For example, PCR[190] refers to the SIU register named SIU_PCR190. 3 The Pad Configuration Register (PCR) PA field is used by software to select pin function. 4 The VDDE and VDDEH supply inputs are broken into segments. Each segment of slow I/O pins (VDDEH) may have a separate supply in the 3.3 V to 5.0 V range (–10%/+5%). Each segment of fast I/O (VDDE) may have a separate supply in the 1.8 V to 3.3 V range (+/– 10%). 5 Terminology is O - output, I - input, Up - weak pull up enabled, Down - weak pull down enabled, Low - output driven low, High - output driven high. A dash for the function in this column denotes that both the input and output buffer are turned off. 6 Function after reset of GPI is general purpose input. A dash for the function in this column denotes that both the input and output buffer are turned off. 7 Not available on 1 MB version of 176-pin package. 8 Not available on 1 MB version of 208-pin package. 9 The GPIO functions on GPIO[206] and GPIO[207] can be selected as trigger functions in the SIU for the ADC by making the proper selections in the SIU_ETISR and SIU_ISEL3 registers in the SIU. 10 Some signals in this section are available only on calibration package. 11 These pins are only available in the 496 CSP/MAPBGA calibration/development package. 12 On the calibration package, the Nexus function on this pin is enabled when the NEXUSCFG pin is high and Nexus is configured to full port mode. On the 176-pin and 208-pin packages, the Nexus function on this pin is enabled permanently. 13 In the calibration package, the I/O segment containing this pin is called VDDE12. 14 208-ball BGA package only 15 When configured as Nexus (208-pin package or calibration package with NEXUSCFG=1), and JCOMP is asserted during reset, MDO[0] is driven high until the crystal oscillator becomes stable, at which time it is then negated. 16 The function of this pin is Nexus when NEXUSCFG is high. 17 High when the pin is configured to Nexus, low otherwise. 18 O/Low for the calibration with NEXUSCFG=0; I/Up otherwise. Table 3. MPC563xM signal properties (continued) Name Function1 Pad Config. Register (PCR)2 PCR PA Field3 I/O Type Voltage4 / Pad Type Reset State5 Function / State After Reset6 Pin No. 144 LQFP 176 LQFP 208 MAPB GA |
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