MPC5633MMLL80 datasheet(16/106 Pages) FREESCALE

16 / 106 page

MPC5634M Microcontroller Data Sheet, Rev. 8

Freescale Semiconductor

— Designed to address AutoSAR task monitor function

•

Software watchdog timer (SWT)

— 32-bit timer

— Clock by system clock or crystal clock

— Can generate either system reset or non-maskable interrupt followed by system reset

— Enabled out of reset

•

Enhanced modular I/O system (eMIOS)

— 16 timer channels (up to 14 channels in 144 LQFP)

— 24-bit timer resolution

— Supports a subset of the timer modes found in eMIOS on MPC5554

— 3 selectable time bases plus shared time or angle counter bus from eTPU2

— DMA and interrupt request support

— Motor control capability

•

Second-generation enhanced time processor unit (eTPU2)

— Object-code compatible with eTPU—no changes are required to hardware or software if only eTPU features are

used

— Intelligent co-processor designed for timing control

— High level tools, assembler and compiler available

— 32 channels (each channel has dedicated I/O pin in all packages)

— 24-bit timer resolution

— 14 KB code memory and 3 KB data memory

— Double match and capture on all channels

— Angle clock hardware support

— Shared time or angle counter bus with eMIOS

— DMA and interrupt request support

— Nexus Class 1 debug support

— eTPU2 enhancements

– Counters and channels can run at full system clock speed

– Software watchdog

– Real-time performance monitor

– Instruction set enhancements for smaller more flexible code generation

– Programmable channel mode for customization of channel operation

•

Enhanced queued A/D converter (eQADC)

— Two independent on-chip RSD Cyclic ADCs

– 8-, 10-, and 12-bit resolution

– Differential conversions

– Targets up to 10-bit accuracy at 500 KSample/s (ADC_CLK = 7.5 MHz) and 8-bit accuracy at 1 MSample/s

(ADC_CLK = 15 MHz) for differential conversions

– Differential channels include variable gain amplifier for improved dynamic range (

1; 2; 4)

– Differential channels include programmable pull-up and pull-down resistors for biasing and sensor diagnostics

(200 k

; 100 k; low value of 5 k)

– Single-ended signal range from 0 to 5 V

– Sample times of 2 (default), 8, 64 or 128 ADC clock cycles

– Provides time stamp information when requested

– Parallel interface to eQADC command FIFOs (CFIFOs) and result FIFOs (RFIFOs)

– Supports both right-justified unsigned and signed formats for conversion results

MPC5633MMLL80 数据表(PDF) 16 Page - Freescale Semiconductor, Inc

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