ATmega16HVB datasheet(150/273 Pages) ATMEL

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8042A–AVR–07/09

ATmega16HVB/32HVB

The C-FET/D-FETs is switched on by pumping the gate OC/OD above the source voltage

(PVT/BATT) of the external FET. When the gate-source voltage has reached a level higher than

typically 13V the pumping frequency is reduced and is regulated to maintain the high gate-

source voltage. For low VFET voltages (< 8 Volts) this level is never reached, thus the pumping

frequency is not reduced. The gate-source voltage for low VFET voltages is close to 2VFET-2V.

To avoid over-heating the external FET's when turning them off OC/OD is pulled quickly low.

If the C-FET is disabled and D-FET enabled, discharge current will run through the body-drain

diode of the C-FET and vice versa. To avoid the potential heat problem from this situation, soft-

ware should ensure that the D-FET is not disabled when a large charge current is flowing, and

that the C-FET is not disabled when a large discharge current is flowing.

25.3.2

DUVR - Deep Under Voltage Recovery Mode without Pre-charge FET

To allow charging of deeply discharged cells using chargers with pre-charge functionality, the

FET Driver can be configured to operate in Deep Under-Voltage Recovery (DUVR) mode.

DUVR mode allows charging of deeply discharged cells without using an additional pre-charge

FET. To enter Deep Under Voltage Recovery Mode, software should clear the DUVRD bit

(DUVRD=0) in the FET Control and Status Register (FCSR).

In DUVR mode the FET Driver regulates the voltage at VFET quickly to typically 4.5V by partly

opening the C-FET. At this voltage the chip is fully operational. With the C-FET partly open the

charger is allowed to charge the battery with a pre-charge current. As the cell voltage starts to

increase above 4.5V the VFET voltage follows the cell voltage. When the total cell voltage has

been charged to a voltage higher than 5V, it is safe to exit DUVR mode and to turn-on the C-FET

completely. Software should then set the DUVRD bit to exit DUVR and fully open the C-FET by

setting the CFET bit. Note that it is recommended that this is done in two steps.

Exit DUVR mode by setting the DUVRD bit.

Wait until register synchronization is complete (see guard time notice in ”Register

Description” on page 153), and enable the C-FET by setting the CFE bit.

To avoid potential heating of the C-FET and D-FET in DUVR mode, the charger should not be

allowed to enter quick-charge until the FET has been completely enabled and the FET driver

has exit DUVR mode. It is therefore recommended to use the CC-ADC to continuously monitor

the current flowing during DUVR mode charging, and to turn-off the FETs if an illegal charge cur-

rent is measured. For fast tracking, it is recommended to use the CC-ADC Instantaneous

Current Output. For details on CC-ADC usage, see ”Coulomb Counter - Dedicated Fuel Gauging

Sigma-delta ADC” on page 108.

Before entering DUVR-mode it is recommended to enable the D-FET. After enabling the D-FET

it is recommended that SW add a hold-off time of 10ms before DUVR mode is entered. This is to

make sure that the D-FET is completely enabled.

To avoid that the charger enters quick-charge before the battery has exit DUVR mode, it is rec-

ommended that either

The battery controls when the charger is allowed to enter quick-charge. This is done by

communicating to the charger over the SMBus line when the charger is allowed to enter

increase the charge current.

The charger itself controls when to enter quick-charge by sensing the voltage at the

Pack+ terminal. It is not recommended that the charger allows quick-charge until the

charger senses a Pack+ voltage higher than 7V. To avoid potential heating problem SW

need to ensure to exit DUVR mode and enable the C-FET before the charger sees this

limit.

ATmega16HVB 数据表(PDF) 150 Page - ATMEL Corporation

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