ATmega16HVB datasheet(151/273 Pages) ATMEL

151 / 273 page

151

8042A–AVR–07/09

ATmega16HVB/32HVB

When the battery is started from a power-off condition by connecting a legal charger, SW should

determine whether to allow charging or not before enabling the C-FET. Before allowing charging

it is recommended to use the V-ADC to measure the cell temperature and cell voltages. Depend-

ing on the total cell voltage, the device should either start up in DUVR mode or in normal

charging mode with the C-FET and D-FET enabled.

• If the total cell voltage is below 4.5V, the battery should enter DUVR charging mode. This

ensures safe operation voltage while allowing charging.

• If the total cell voltage is above 4.5V, the battery should enter normal charging mode with both

C-FET and D-FET enabled.

The ”DUVR mode charging in 3-cell mode configuration” on page 151 shows an example of

charging 3 deeply discharged Li-ion cells in series using DUVR mode.

Figure 25-3. DUVR mode charging in 3-cell mode configuration

A charger with 12.6V charge voltage is plugged to the Pack+ pin and the

ATmega16HVB/32HVB enters reset mode. Charger should be configured with a charge

current limit (pre-charge current).

The ATmega16HVB/32HVB exit reset and initializes modules. To determine if charging

should be allowed and if DUVR mode should be entered, cell temperature and cell volt-

ages are measured by the V-ADC.

D-FET is enabled and the VFET voltage increase to the Pack+ level.

DUVR mode is entered by clearing the DUVRD bit in FCSR. The VFET voltage and the

Pack+ voltage will now be regulated to approximately 4.5V.

The total cell voltage has reached the regulated VFET limit and VFET follows the cell

voltage as the battery is charged.

The total cell voltage has reached 5V. DUVR mode is disabled and the C-FET can be

fully enabled. DUVR mode should be disabled before the C-CFET is enabled. VFET and

1 2

5 6

RESET

DUVRD

CFE

DFE

PVT

VFET

Pack+

ATmega16HVB 数据表(PDF) 151 Page - ATMEL Corporation

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