ADE7858ACPZ datasheet(32/76 Pages) AD

32 / 76 page

ADE7858

Preliminary Technical Data

Rev. PrA| Page 32 of 76

16, AIRMS, BIRMS and CIRMS 24-bit signed registers are

accessed as 32-bit registers with 8 most significant bits padded

with 0s.

Current RMS Offset Compensation

The ADE7858 incorporates a current rms offset compensation

CIRMSOS[23:0]. These are 24-bit signed registers and are used

to remove offsets in the current rms calculations. An offset can

exist in the rms calculation due to input noises that are

integrated in the dc component of I2(t). One LSB of the current

rms offset compensation register is equivalent to one LSB of the

current rms register. Assuming that the maximum value from

the current rms calculation is 4,191,400 with full-scale ac inputs

(50 Hz), one LSB of the current rms offset represents 0.00037%

(

100

4191

128

4191



















) of the rms measurement at 60

dB down from full scale. Calibration of the offset should be

done at low current and values at zero input should be ignored.

IRMSOS

IRMS







128

(14)

where IRMS0 is the rms measurement without offset correction.

Note that at low currents, certain negative offset values of

IRMSOS may determine a negative square root argument in

expression (14). As the square root circuit requires positive

arguments only, the result of the square root operation is

erroneous, equal to 0x7FFFFF. It is recommended to avoid

using big, negative IRMSOS values and as the equivalent rms

value of a full-scale sinusoidal signal is 4,191,910(0x3FF6A6),

much smaller than 0x7FFFFF, such values may be easily

eliminated from consideration.

As previously stated, the serial ports of the ADE7858 work on

32, 16 or 8-bit words and the DSP works on 28 bits. Similar to

the register presented in Figure 15, AIRMSOS, BIRMSOS and

CIRMSOS 24-bit signed registers are accessed as 32-bit registers

with 4 most significant bits padded with 0s and sign extended

to 28 bits.

Voltage Channel RMS Calculation

Figure 37 shows the detail of the signal processing chain for the

rms calculation on one of the phases of the voltage channel. The

voltage channel rms value is processed from the samples used in

the voltage channel. The voltage rms values are signed 24-bit

values and they are stored into the registers AVRMS[23:0],

BVRMS[23:0] and CVRMS[23:0]. The update rate of the

current rms measurement is 8KHz.

With the specified full-scale analog input signal of 0.5 V, the

ADC produces an output code that is approximately

±5,928,256. The equivalent rms value of a full-scale sinusoidal

signal is 4,191,910 (0x3FF6A6), independent of the line

frequency.

The accuracy of the voltage rms is typically 0.1% error from the

full-scale input down to 1/1000 of the full-scale input. Additionally,

this measurement has a bandwidth of 2 kHz. It is recommended

to read the rms registers synchronous to the voltage zero

crossings to ensure stability. The

IRQ interrupt can be used to

indicate when a zero crossing has occurred (see the Interrupts

section).

xVRMSOS[23:0]

LPF



xVRMS[23:0]

VOLTAGE SIGNAL

FROM HPF

0x5A7540=

5,928,256

0xA58AC0=

-5,928,256

Figure 37. Voltage RMS Signal Processing

Table 11 shows the settling time for the VRMS measurement,

which is the time it takes for the rms register to reflect the value

at the input to the voltage channel.

Table 11. Settling Time for VRMS Measurement

50Hz Input signals

60Hz Input signals

530 ms

As previously stated, the serial ports of the ADE7858 work on

32, 16 or 8-bit words. Similar to the register presented in Figure

16, AVRMS, BVRMS and CVRMS 24-bit signed registers are

accessed as 32-bit registers with 8 most significant bits padded

with 0s.

Voltage RMS Offset Compensation

The ADE7858 incorporates a voltage rms offset compensation

for each phase AVRMSOS[23:0], BVRMSOS[23:0], and

CVRMSOS[23:0]. These are 24-bit signed registers used to

remove offsets in the voltage rms calculations. An offset can

exist in the rms calculation due to input noises that are

integrated in the dc component of V2(t). One LSB of the voltage

rms offset compensation register is equivalent to one LSB of the

voltage rms register. Assuming that the maximum value from

the voltage rms calculation is 4,191,400 with full-scale ac inputs

(50 Hz), one LSB of the current rms offset represents 0.00037%

(

100

4191

128

4191



















) of the rms measurement at 60

dB down from full scale. Calibration of the offset should be

done at low current and values at zero input should be ignored.

VRMSOS

VRMS







128

(15)

where VRMS0 is the rms measurement without offset

correction.

Note that at low currents, certain negative offset values of

VRMSOS may determine a negative square root argument in

expression (15). As the square root circuit requires positive

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