ADE7858ACPZ datasheet(25/76 Pages) AD

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Preliminary Technical Data

ADE7858

Rev. PrA | Page 25 of 76

Zero-Crossing Timeout

Every zero-crossing detection circuit has an associated timeout

ZXTOUT register and is decremented (1 LSB) every 62.5 μs

(16KHz clock). The register is reset to ZXTOUT value every

time a zero crossing is detected. The default value of this

a zero crossing is detected, then one of bits 8-3 of

STATUS1[31:0] register is set to 1. Bit 3 (ZXTOVA), bit 4

(ZXTOVB) and bit 5 (ZXTOVC) refer to phases A, B and C of

the voltage channel, bit 6 (ZXTOIA), bit 7 (ZXTOIB), bit 8

(ZXTOIC) refer to phases A, B and C of the current channel. If

a ZXTOUT bit is set in the MASK1[31:0] register, the

IRQ

interrupt pin is driven low when the corresponding status

bit is set to 1. The status bit is cleared and

IRQ

pin is set back

high by writing STATUS1 register with the status bit set to 1.

The resolution of ZXOUT register is 62.5 μs (16KHz clock) per

LSB. Thus, the maximum time-out period for an interrupt is

4.096seconds: 216/16KHz.

Figure 25 shows the mechanism of the zero-crossing timeout

detection when the voltage or the current signal stays at a fixed

dc level for more than 62.5 x ZXTOUT μs.

ZXTOxy flag in

STATUS1[31:0],x=V,A

y=A,B,C

Voltage

Current

Signal

16-bit INTERNAL

ZXTOUT

IRQ1\ interrupt pin

Figure 25. Zero-Crossing Timeout Detection

Phase Sequence Detection

The ADE7858 has an on-chip phase sequence error detection

circuit. This detection works on phase voltages and considers

only the zero crossings determined by their negative to positive

transitions. The regular succession of these zero crossing events

is phase A followed by phase B followed by phase C (see Figure

27). If the sequence of zero crossing events is instead phase A,

followed by phase C followed by phase B, then bit 19 (SEQERR)

in STATUS1[31:0] register is set. If bit 19 (SEQERR) in

MASK1[31:0] register is set to 1 and a phase sequence error

event is triggered, then

IRQ interrupt pin is driven low. The

status bit is cleared and

IRQ

pin is set back high by writing

STATUS1 register with the status bit 19 (SEQERR) set to 1.

The phase sequence error detection circuit is functional only

when the ADE7858 is connected in a 3 phase 4 wire 3 voltage

sensors configuration (bits 5,4 CONSEL in ACCMODE[7:0] set

to 00). In all other configurations, only two voltage sensors are

used and therefore it is not recommended to use the detection

circuit. In these cases, the time intervals between phase voltages

should be used to analyze the phase sequence (see Time

Interval Between Phases section for details).

Figure 26 presents the case in which phase A voltage is not

followed by phase B voltage, but by phase C voltage. Every time

a negative to positive zero crossing occurs, bit 19 (SEQERR) in

STATUS1[31:0] register is set to 1 because such zero crossings

on phase C, B or A cannot come after zero crossings from phase

A, C or respectively B zero crossings.

Phase A

Phase B

Phase C

ZX A

ZX C

ZX B

Bit 19 (SEQERR) in

STATUS1[31:0]

STATUS1[19] set to 1

A,B, C Phase

Voltages after

LPF1

IRQ

STATUS1[19] cancelled

by a write to

STATUS1[31:0] with

SEQERR bit set

Figure 26. SEQERR bit set to 1 when phase A voltage is followed by phase C

voltage

Once a phase sequence error has been detected, the time

measurement between various phase voltages (see Time Interval

Between Phases section) may help to identify which phase

voltage should be considered with another phase current in the

computational data path. The bits 9-8 (VTOIA[1:0]), 11-10

(VTOIB[1:0] ) and 13-12 (VTOIC[1:0]) in CONFIG[15:0]

path of another phase. See Changing Phase Voltage Data Path

section for details.

Time Interval Between Phases

The ADE7858 has the capability to measure the time delay

between phase voltages, between phase currents or between

voltages and currents of the same phase. The negative to

positive transitions identified by the zero-crossing detection

circuit are used as start and stop measuring points. Only one set

of such measurements are available at one time, based on bits

10, 9 (ANGLESEL[1:0]) in COMPMODE[15:0] register.

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