ADE7858ACPZ datasheet(16/76 Pages) AD

16 / 76 page

ADE7858

Preliminary Technical Data

Rev. PrA| Page 16 of 76

POWER MANAGEMENT

The ADE7858 has two modes of operation, determined by the

state of PM0 and PM1 pins (see Table 7). These pins provide a

complete control of ADE7858 operation and could easily be

connected to an external microprocessor I/O. The PM1 pin has

an internal pull up resistor. Table 8 lists actions that are

recommended before and after setting a new power mode.

Table 9 presents actions that are recommended before and after

setting a new power mode.

Table 7. ADE7858 Power Supply Modes

Power Supply Modes

PM1

PSM0 – normal power mode

PSM3 – sleep mode

PSM0 – Normal Power Mode

In PSM0 mode, the ADE7858 is fully functional. The PM1 pin

is set to low for the ADE7858 to enter this mode.

If the ADE7858 is in PSM3 mode and is switched into PSM0

mode, all control registers take the default values with the

exception of CONFIG2[7:0] register that maintains its value.

The ADE7858 signals the end of the transition period by

triggering

IRQ interrupt pin low and setting bit 15

(RSTDONE) in STATUS1[31:0] register to 1. This bit is 0

during the transition period and becomes 1 when the transition

is finished. The status bit is cleared and

IRQ pin is set back

high by writing STATUS1[31:0] register with the corresponding

bit set to 1. The bit 15 (RSTDONE) in interrupt mask register

does not have any functionality attached even if

IRQ pin goes

low when bit 15 (RSTDONE) in STATUS1[31:0] is set to 1. This

makes RSTDONE interrupt unmaskable.

PSM3 – Sleep Mode

In this mode, ADE7858 has most of the internal circuits of the

ADE7854 are turned off and the current consumption is the

lowest. The I2C, HSDC or SPI ports are not functional during

this mode. The pins RESET , SCLK/SCL, MOSI/SDA and

/HSA should be set high.

Power Up Procedure

The ADE7858 contains an on-chip power supply monitor that

supervises the power supply VDD. At power up, until VDD

reaches 2V ± 10%, the chip is in an inactive state. As VDD

crosses this threshold, the power supply monitor keeps the chip

in this inactive state for 26msec more, allowing VDD to achieve

3.3V-10%, the minimum recommended supply voltage. As PM1

pin has an internal pull up resistors and the external

microprocessor keeps it high, the ADE7858 always powers up

in sleep mode PSM3. Then, an external circuit (i.e.

microprocessor) sets PM1 pin to low level, allowing the

ADE7858 to enter normal mode PSM0. The passage from

PSM3 mode in which most of the internal circuitry is turned off

to PSM0 mode in which all functionality is enabled is done in

less than 40msec. See Figure 8 for details.

ADE7858

Powered UP

2.0V+/-10%

3.3V-10%

ADE7858

enters PSM3

26msec

POR timer

turned ON

Microprocessor

makes the

choice between

I2C and SPI

RSTDONE

interrupt

triggered

ADE7858

PSM0 ready

Microprocessor

sets ADE7858

in PSM0

40msec

Figure 8. ADE7858 power up procedure

As the ADE7858 enters PSM0 mode, the I2C port is the active

serial port. If the SPI port is used, then the SS pin must be

toggled three times high to low. This action selects the

ADE7858 into using the SPI port for further use. If I2C is the

ADE7858ACPZ 数据表(PDF) 16 Page - Analog Devices

ADE7858ACPZ 数据表(HTML) 16 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76

数据表下载

链接网址

ADE7858ACPZ 数据表(PDF) 16 Page - Analog Devices

ADE7858ACPZ 数据表(HTML) 16 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76

数据表 下载

链接网址

数据表下载